By implementing an arch_nvram_ops struct, any platform can re-use the
drivers/char/nvram module without needing any arch-specific code
in that module. Atari does so here.
Atari has one user of nvram_check_checksum() whereas the other platforms
(i.e. x86 and ARM platforms) have none at all. Replace
The generic NVRAM module, drivers/char/generic_nvram, implements a
/dev/nvram misc device. It is used only by 32-bit PowerPC platforms and
isn't generic enough to be more widely used.
The RTC NVRAM module, drivers/char/nvram, also implements a /dev/nvram
misc device. It is used by x86, ARM and m6
On powerpc, setting CONFIG_NVRAM=n builds a kernel with no NVRAM support.
Setting CONFIG_NVRAM=m enables the /dev/nvram misc device module without
enabling NVRAM support in drivers. Setting CONFIG_NVRAM=y enables the
misc device (built-in) and also enables NVRAM support in drivers.
m68k shares the
Also give functions more sensible names: nvram_misc_* for misc device ops,
nvram_proc_* for proc file ops and nvram_module_* for init and exit
functions. This makes them distict from nvram_ops members.
Signed-off-by: Finn Thain
---
drivers/char/nvram.c | 194 ++-
Move the m68k-specific code elsewhere to make the driver generic.
Signed-off-by: Finn Thain
Tested-by: Christian T. Steigies
Acked-by: Geert Uytterhoeven
---
Changes since v3:
- Move the vmode fix to a separate patch as requested by Geert.
---
arch/m68k/atari/Makefile |2
arch/m68k/ata
Signed-off-by: Finn Thain
---
drivers/char/nvram.c |1 +
1 file changed, 1 insertion(+)
Index: linux/drivers/char/nvram.c
===
--- linux.orig/drivers/char/nvram.c 2015-11-01 21:41:35.0 +1100
+++ linux/drivers/char/nv
The nvram_read_byte() and nvram_write_byte() definitions in asm/nvram.h
duplicate those in linux/nvram.h. Get rid of the former to prepare for
adoption of struct arch_nvram_ops (which is defined in linux/nvram.h for
general use).
Signed-off-by: Finn Thain
---
Changes since v4:
- Fix possible gi
Signed-off-by: Finn Thain
---
drivers/char/nvram.c | 16 +---
1 file changed, 1 insertion(+), 15 deletions(-)
Index: linux/drivers/char/nvram.c
===
--- linux.orig/drivers/char/nvram.c 2015-11-01 21:41:34.0
Implement arch_nvram_ops for PPC32 and make use of it in the generic_nvram
misc device module so that the nvram_* function exports can be removed.
Signed-off-by: Finn Thain
---
arch/powerpc/include/asm/nvram.h |3 ---
arch/powerpc/kernel/setup_32.c | 10 +++---
drivers/char/generic_
Different platforms and architectures offer different NVRAM sizes and
access methods. E.g. PPC32 has byte-at-a-time read/write functions whereas
PPC64 has byte-range read/write functions. Adopt the nvram_ops struct so
the nvram module can call such functions as are defined by the various
platforms
The drivers/char/nvram module has previously only supported RTC "CMOS"
NVRAM, for which it provides appropriate checksum ioctls. Make these
ioctls optional so the module can be re-used with other kinds of NVRAM.
The ops struct methods that implement the ioctls now return error
codes so that a mult
Make use of arch_nvram_ops in the thinkpad_acpi driver so that the
nvram_* function exports can be removed.
This patch series was tested on a ThinkPad T43.
Signed-off-by: Finn Thain
Acked-by: Henrique de Moraes Holschuh
Reviewed-by: Darren Hart
---
drivers/platform/x86/thinkpad_acpi.c | 20
Atari RTC NVRAM has a checksum so implement the remaining arch_nvram_ops
methods for the set_checksum and initialize ioctls. Enable
CONFIG_HAVE_ARCH_NVRAM_OPS.
Signed-off-by: Finn Thain
Acked-by: Geert Uytterhoeven
---
This re-enables the nvram module for Atari.
Changes since v3:
- Use bool (
Refactor the RTC "CMOS" NVRAM functions so that they can be used as
arch_nvram_ops methods. Checksumming logic is moved from the misc device
operations to the nvram read/write operations.
This makes the misc device implementation more generic. This also
preserves the locking semantics such that "r
Add the nvram_size() function to those PowerPC platforms that don't already
have one: CHRP and PowerMac. This means that the ppc_md.nvram_size()
function can be used to implement arch_nvram_ops.get_size()
Since we are addressing inconsistencies here, also rename chrp_nvram_read
and chrp_nvram_writ
Drivers now use the arch_nvram_ops calls so remove the function exports and
prototypes. nvram_check_checksum() is unused so remove it.
Signed-off-by: Finn Thain
Acked-by: Geert Uytterhoeven
---
arch/m68k/atari/nvram.c |6 +++---
drivers/char/nvram.c| 27 +--
i
Make use of arch_nvram_ops in device drivers so that the nvram_* function
exports can be removed.
Since they are no longer global symbols, rename the PPC32 nvram_* functions
appropriately.
Signed-off-by: Finn Thain
---
Changed since v4:
- Split off the CONFIG_PPC32, CONFIG_PPC_PMAC and CONFIG_
Add the powerpc-specific sync() method to struct nvram_ops and implement
the corresponding ioctl in the nvram module. This allows the nvram module
to replace the generic_nvram module.
Signed-off-by: Finn Thain
---
On PPC32, the IOC_NVRAM_SYNC ioctl call always returns 0, even for those
platform
Adopt nvram module to reduce code duplication. This means CONFIG_NVRAM
becomes available to CONFIG_PPC64 builds (until now it was only PPC32).
The IOC_NVRAM_GET_OFFSET ioctl as implemented on PPC64 validates the offset
returned by pmac_get_partition(). Add this test to the nvram module.
Note that
A multi-platform kernel binary needs to decide at run-time how to dispatch
the arch_nvram_ops calls. Add platform-independent arch_nvram_ops, for use
when multiple platform-specific NVRAM ops implementations are needed.
Enable CONFIG_HAVE_ARCH_NVRAM_OPS for Macs.
Signed-off-by: Finn Thain
Tested
Adopt the existing *_read_byte and *_write_byte naming convention.
Rename via_pram_readbyte and via_pram_writebyte to avoid confusion.
Adjust calling conventions of mac_pram_* functions to match the
arch_nvram_ops struct methods.
Signed-off-by: Finn Thain
Acked-by: Geert Uytterhoeven
---
Chang
Switch PPC32 kernels from the generic_nvram module to the nvram module.
Also fix a theoretical bug where CHRP omits the chrp_nvram_init()
call when CONFIG_NVRAM_MODULE=m.
Signed-off-by: Finn Thain
---
The change in the name of the module is visible to userspace. The module that
implements /dev
This patch addresses inconsistencies in Mac framebuffer drivers and their
use of Kconfig symbols relating to NVRAM, so PPC64 can use CONFIG_NVRAM.
Macintosh framebuffer drivers use default settings for color mode and
video mode that are found in NVRAM. On PCI Macs, MacOS stores display
settings in
The arch_nvram_ops methods provide a uniform API for drivers and ioctls.
This API is used to replace older APIs like the nvram_{read,write}_byte()
exports and the pmac_xpram_{read,write} functions.
The latter API is removed in this patch. The addition of the
get_partition() method to struct nvram_
And thus eliminate some twisted CONFIG_GENERIC_NVRAM logic.
Signed-off-by: Finn Thain
---
drivers/char/Makefile|6 -
drivers/char/generic_nvram.c | 175 ---
2 files changed, 1 insertion(+), 180 deletions(-)
Index: linux/drivers/char/Makefile
Signed-off-by: Finn Thain
Acked-by: Geert Uytterhoeven
---
Tested on a PowerBook 520 and Quadra 650.
Changes since v2:
- Make use of the RTC_* macros from the previous patch and add a few more
besides.
---
arch/m68k/mac/misc.c | 39 +--
include/uapi/
Signed-off-by: Finn Thain
Acked-by: Geert Uytterhoeven
---
This is intended to improve code style and not affect code behaviour.
I've tested this on a Quadra 650.
I don't know the meanings of the 4 undocumented write protect register
bits 0x55, so I decided against defining 4 macros for those
On Tue, Oct 06, 2015 at 05:55:49PM -0500, Scott Wood wrote:
> Commit a304e2d82a8c3 ("ppc64: purgatory: Reset primary cpu endian to
> big-endian) changed bctr to rfid. rfid is book3s-only and will cause a
> fatal exception on book3e.
>
> Purgatory is an isolated environment which makes importing i
On 11/01/2015 12:53 PM, Wei Yang wrote:
On Fri, Oct 30, 2015 at 04:20:48PM +1100, Alexey Kardashevskiy wrote:
On 10/26/2015 02:16 PM, Wei Yang wrote:
Different from PCI bus dependent PE, PE for VFs doesn't have the
s/Different from/Unlike/
Will change in next version.
primary bus, on w
On Mon, Nov 02, 2015 at 09:55:53AM +1100, Sam Mendoza-Jonas wrote:
> On Tue, Oct 06, 2015 at 05:55:49PM -0500, Scott Wood wrote:
> > Commit a304e2d82a8c3 ("ppc64: purgatory: Reset primary cpu endian to
> > big-endian) changed bctr to rfid. rfid is book3s-only and will cause a
> > fatal exception o
On Thu, 2015-10-29 at 13:39 +0100, Frederic Barrat wrote:
> When the cxl driver creates a context, it stores the pid of the
> calling task, incrementing the reference count on the struct
> pid. Current code mistakenly increments the reference count twice,
> once through get_task_pid(), once throug
On Fri, Oct 30, 2015 at 08:56:33AM +0800, Boqun Feng wrote:
> On Tue, Oct 27, 2015 at 11:06:52AM +0800, Boqun Feng wrote:
> > On Tue, Oct 27, 2015 at 01:33:47PM +1100, Michael Ellerman wrote:
> > > On Mon, 2015-26-10 at 10:15:36 UTC, Boqun Feng wrote:
> > > > This patch fixes two problems to make v
On Fri, 2015-10-30 at 15:31 -0700, Ram Pai wrote:
> icswx occasionally under heavy load sets bit 3 of condition register 0.
Why?
Also you seem to be using IBM bit numbering, so please be explicit about that,
or use normal bit numbering.
> It has no software implication.
What does it mean? You m
On Fri, 2015-10-30 at 15:13 -0700, Ram Pai wrote:
> The nx-842 compressor overshoots the output buffer corrupting memory. Verified
> that the following patch the issue on a LE system.
This seems like a bug fix, so it should go to stable shouldn't it? If so which
version(s) should it apply to?
An
According to memory-barriers.txt:
> Any atomic operation that modifies some state in memory and returns
> information about the state (old or new) implies an SMP-conditional
> general memory barrier (smp_mb()) on each side of the actual
> operation ...
Which mean these operations should be fully
According to memory-barriers.txt, xchg*, cmpxchg* and their atomic_
versions all need to be fully ordered, however they are now just
RELEASE+ACQUIRE, which are not fully ordered.
So also replace PPC_RELEASE_BARRIER and PPC_ACQUIRE_BARRIER with
PPC_ATOMIC_ENTRY_BARRIER and PPC_ATOMIC_EXIT_BARRIER i
On Mon, Nov 02, 2015 at 11:21:43AM +1100, Sam Mendoza-Jonas wrote:
> On Mon, Nov 02, 2015 at 09:55:53AM +1100, Sam Mendoza-Jonas wrote:
> > On Tue, Oct 06, 2015 at 05:55:49PM -0500, Scott Wood wrote:
> > > Commit a304e2d82a8c3 ("ppc64: purgatory: Reset primary cpu endian to
> > > big-endian) change
On Mon, Nov 02, 2015 at 09:30:31AM +0800, Boqun Feng wrote:
> According to memory-barriers.txt:
>
> > Any atomic operation that modifies some state in memory and returns
> > information about the state (old or new) implies an SMP-conditional
> > general memory barrier (smp_mb()) on each side of th
On Mon, Nov 02, 2015 at 09:30:32AM +0800, Boqun Feng wrote:
> According to memory-barriers.txt, xchg*, cmpxchg* and their atomic_
> versions all need to be fully ordered, however they are now just
> RELEASE+ACQUIRE, which are not fully ordered.
>
> So also replace PPC_RELEASE_BARRIER and PPC_ACQUI
On 31/10/15 00:07, Arnd Bergmann wrote:
On Wednesday 28 October 2015 14:29:39 Andrew Donnellan wrote:
--- a/drivers/misc/cxl/vphb.c
+++ b/drivers/misc/cxl/vphb.c
@@ -128,7 +128,7 @@ static int cxl_pcie_config_info(struct pci_bus *bus,
unsigned int devfn,
return PCIBIOS_BAD_REGI
-Original Message-
From: Raghav Dogra [mailto:rag...@freescale.com]
Sent: Friday, October 30, 2015 11:55 AM
To: linuxppc-dev@lists.ozlabs.org
Cc: Wood Scott-B07421 ; Kushwaha Prabhakar-B32579
; Dogra Raghav-B46184
Subject: [PATCH 1/2] mpc85xx/lbc: modify suspend/resume entry sequence
41 matches
Mail list logo
