Keep it seperate to make rebasing easier
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 4 ++--
arch/powerpc/include/asm/book3s/64/pgtable.h | 8
arch/powerpc/include/asm/pgtable-ppc32.h | 2 --
arch/powerpc/include/asm/pgtab
In this patch we do:
cp pgtable-ppc32.h book3s/32/pgtable.h
cp pgtable-ppc64.h book3s/64/pgtable.h
This enable us to do further changes to hash specific config.
We will change the page table format for 64bit hash in later patches.
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
.../in
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/{pte-hash32.h => book3s/32/hash.h} | 0
arch/powerpc/include/asm/{pte-hash64.h => book3s/64/hash.h} | 0
arch/powerpc/include/asm/pgtable-ppc32.h| 2 +-
arch/powerpc/include/asm/pgtable-ppc64.h
We also convert few #define to static inline in this patch for better
type checking
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/pgtable.h | 118 +-
arch/powerpc/include/asm/page.h | 10 ++-
arch/powerpc/include/
Hi All,
This patch series attempt to update book3s 64 linux page table format to
make it more flexible. Our current pte format is very restrictive and we
overload multiple pte bits. This is due to the non-availability of free bits
in pte_t. We use pte_t to track the validity of 4K subpages. This p
Splitting this so that rename can track changes to file. Before merging
we will fold this
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/hash.h | 6 +++---
.../include/asm/{pte-hash64-4k.h => book3s/64/hash-4k.h} | 1 -
.
We copy only needed PTE bits define from pte-common.h to respective
hash related header. This should greatly simply later patches in which
we are going to change the pte format for hash config
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash-4k.h
functions which operate on pte bits are moved to hash*.h and other
generic functions are moved to pgtable.h
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 183
arch/powerpc/include/asm/book3s/64/hash.h| 151 ++
We also move __ASSEMBLY__ towards the end of header. This avoid
having #ifndef __ASSEMBLY___ all over the header
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 93 +++-
arch/powerpc/include/asm/book3s/64/pgtable.h
This further make a copy of pte defines to book3s/64/hash*.h. This
remove the dependency on ppc64-4k.h and ppc64-64k.h
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash-4k.h | 87 ++-
arch/powerpc/include/asm/book3s/64/hash
We are going to drop pte_common.h in the later patch. The idea is to
enable hash code not require to define all PTE bits. Having PTE bits
defined in pte_common.h made the code unnecessarily complex.
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/pgtable
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/nohash/32/pgtable.h | 16
arch/powerpc/include/asm/{ => nohash/32}/pte-40x.h | 0
arch/powerpc/include/asm/{ => nohash/32}/pte-44x.h | 0
arch/powerpc/include/asm/{ => noh
We convert them static inline function here as we did with pte_val in
the previous patch
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 6 -
arch/powerpc/include/asm/book3s/64/hash-4k.h | 6 -
arch/powerpc/include/asm/book3s/64/
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/{pgtable-ppc32.h => nohash/32/pgtable.h} | 0
arch/powerpc/include/asm/{pgtable-ppc64.h => nohash/64/pgtable.h} | 2 +-
arch/powerpc/include/asm/nohash/pgtable.h | 8
3 files change
We will use the increased size to store more information of 4K pte
when using 64K page size. The idea is to free up bits in pte_t.
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/pgalloc-64.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
d
Move the booke related headers below booke/32 or booke/64
We are splitting this change into multiple patch to make the rebasing
easier. The following patches can be folded into this if needed.
They are kept separate for easier review.
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
ar
This enables us to keep hash64 related bits together, and makes it easy
to follow.
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash.h| 452 ++-
arch/powerpc/include/asm/book3s/64/pgtable.h | 449 +---
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
.../include/asm/{pgtable-ppc64-4k.h => nohash/64/pgtable-4k.h} | 0
.../asm/{pgtable-ppc64-64k.h => nohash/64/pgtable-64k.h} | 0
arch/powerpc/include/asm/nohash/64/pgtable.h | 10 +-
3 files changed, 5 in
We will use this in the later patch to compute the right hash index
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash-64k.h | 2 +-
arch/powerpc/include/asm/book3s/64/pgtable.h | 4 ++--
arch/powerpc/include/asm/nohash/64/pgtable.h | 4 ++--
arch
Only difference here is, we apply the WIMG mapping early, so rflags
passed to updatepp will also be changed.
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hash64_4k.c | 5 -
arch/powerpc/mm/hash64_64k.c | 10 --
arch/powerpc/mm/hash_utils
Currently we use 4 bits for each slot and pack all the 16 slot
information related to a 64K linux page in a 64bit value. To do this
we use 16 bits of pte_t. Move the hash slot valid bit out of pte_t
and place them in the second half of pte page. We also use 8 bit
per each slot.
Acked-by: Scott Woo
No real change, only style changes
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash.h | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/hash.h
b/arch/powerpc/includ
This is similar to 64K insert. May be we want to consolidate
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/Makefile| 6 +-
arch/powerpc/mm/hash64_4k.c | 139 +
arch/powerpc/mm/hash_low_64.S | 331
Convert from asm to C
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash-64k.h | 3 +-
arch/powerpc/include/asm/book3s/64/hash.h | 1 +
arch/powerpc/mm/hash64_64k.c | 134 +++-
arch/powerpc/mm/hash_low_64.S
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/Makefile| 3 +
arch/powerpc/mm/hash64_64k.c| 202 +
arch/powerpc/mm/hash_low_64.S | 380
arch/powerpc/mm/hash_utils_64.c | 4 +-
4 files changed
W.r.t hugetlb, we support two format for pmd. With book3s_64 and
64K linux page size, we can have pte at the pmd level. Hence we
don't need to support hugepd there. For everything else hugepd
is supported and pmd_huge is (0).
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc
We should not expect pte bit position in asm code. Simply
by moving part of that to C
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/kernel/exceptions-64s.S | 16 +++-
arch/powerpc/mm/hash_utils_64.c | 29 +
2 files changed, 32
Instead of open coding it in multiple code paths, export the helper
and add more documentation. Also make sure we don't make assumption
regarding pte bit position
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash.h | 1 +
arch/powerpc/mm/hash64_4k
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/nohash/32/pte-40x.h | 6 +++---
arch/powerpc/include/asm/nohash/32/pte-44x.h | 6 +++---
arch/powerpc/include/asm/nohash/32/pte-8xx.h | 6 +++---
arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h
We support THP only with book3s_64 and 64K page size. Move
THP details to hash64-64k.h to clarify the same.
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash-64k.h | 126 +
arch/powerpc/include/asm/book3s/64/hash.h | 223 +--
This free up 11 bits in pte_t. In the later patch we also change
the pte_t format so that we can start supporting migration pte
at pmd level.
Acked-by: Scott Wood
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hash-4k.h | 10 +
arch/powerpc/include/asm/book3s/64
For a pte entry we will have _PAGE_PTE set. Our pte page
address have a minimum alignment requirement of HUGEPD_SHIFT_MASK + 1.
We use the lower 7 bits to indicate hugepd. ie.
For pmd and pgd we can find:
1) _PAGE_PTE set pte -> indicate PTE
2) bits [2..6] non zero -> indicate hugepd.
They also
Andrew Morton writes:
> On Fri, 16 Oct 2015 14:07:05 +0200 Laurent Dufour
> wrote:
>
>> This series is enabling the software memory dirty tracking in the
>> kernel for powerpc. This is the follow up of the commit 0f8975ec4db2
>> ("mm: soft-dirty bits for user memory changes tracking") which
>>
Laurent Dufour writes:
> As mentioned in the commit 56eecdb912b5 ("mm: Use ptep/pmdp_set_numa()
> for updating _PAGE_NUMA bit"), architecture like ppc64 doesn't do
> tlb flush in set_pte/pmd functions.
>
> So when dealing with existing pte in clear_soft_dirty, the pte must
> be cleared before bei
Laurent Dufour writes:
> Don't build clear_soft_dirty_pmd() if the transparent huge pages are
> not enabled.
>
> Signed-off-by: Laurent Dufour
> CC: Aneesh Kumar K.V
Reviewed-by: Aneesh Kumar K.V
> ---
> fs/proc/task_mmu.c | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(
Laurent Dufour writes:
> User space checkpoint and restart tool (CRIU) needs the page's change
> to be soft tracked. This allows to do a pre checkpoint and then dump
> only touched pages.
>
> This is done by using a newly assigned PTE bit (_PAGE_SOFT_DIRTY) when
> the page is backed in memory, an
On Sat, 2015-10-17 at 15:38 +0530, Aneesh Kumar K.V wrote:
> Hi All,
>
> This patch series attempt to update book3s 64 linux page table format to
> make it more flexible. Our current pte format is very restrictive and we
> overload multiple pte bits. This is due to the non-availability of free bit
On Sat, 2015-10-17 at 17:49 +0530, Aneesh Kumar K.V wrote:
> This will break after
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2015-October/135298.html
>
>
> A good option is to drop this patch from the series and let Andrew take
> the first two patches. You can send an updated version of p
Event Based Branches currenly available on POWER8.
so we can skip them on other CPUs.
I've found that at least one test loops forever
on 970MP (cycles_with_freeze_test).
Signed-off-by: Denis Kirjanov
---
.../selftests/powerpc/pmu/ebb/back_to_back_ebbs_test.c | 2 ++
.../selftests/powerpc/
- Original Message -
> From: "Stewart Smith"
> To: linuxppc-dev@lists.ozlabs.org
> Cc: pau...@samba.org, th...@redhat.com, jstan...@redhat.com,
> dgib...@redhat.com, b...@kernel.crashing.org, "Stewart
> Smith" , sta...@vger.kernel.org
> Sent: Friday, 16 October, 2015 3:20:35 AM
> Subj
On Tue, Oct 06 2015, Rasmus Villemoes wrote:
> v2: fix build failure on ppc, add acks.
Does anyone want to take these through their tree?
Rasmus
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Rasmus Villemoes writes:
> On Tue, Oct 06 2015, Rasmus Villemoes wrote:
>
>> v2: fix build failure on ppc, add acks.
>
> Does anyone want to take these through their tree?
I think the x86 tree is the least illogical place, unless akpm wants it?
Cheers,
Rusty.
___
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