After interface restart (eg: after link disconnection/reconnection), the bridge
function doesn't work anymore. This is due to the promiscuous mode being cleared
by the restart.
The mac-fcc already includes code to set the promiscuous mode back during the
restart.
This patch adds the same handling
Hi Liu,
On 10/17/2014 12:59 AM, kernelf...@gmail.com wrote:
> To enter guest, primary hwtherad schedules the stopper func on
> secondary threads and force them into NAP mode.
> When exit to host,secondary threads hardcode to restore the stack,
> then switch back to the stopper func, i.e host.
>
>
Michael Neuling writes:
> This enables NUMA balancing in pseries[_le]_defconfig.
>
> NUMA balancing can do some nasty things with the low level mm code and
> has been causing some issues with the cxl driver.
What sort of issues ?
-aneesh
___
Linuxpp
On 18/10/14 00:13, Jani Nikula wrote:
> Documentation/kbuild/kconfig-language.txt warns to use select with care,
> and in general use select only for non-visible symbols and for symbols
> with no dependencies, because select will force a symbol to a value
> without visiting the dependencies.
>
> S
On 22.10.14 06:37, Michael Ellerman wrote:
> The generic Linux framework to power off the machine is a function pointer
> called pm_power_off. The trick about this pointer is that device drivers can
> potentially implement it rather than board files.
>
> Today on powerpc we set pm_power_off to i
On 10/14/2014 02:08 PM, Neelesh Gupta wrote:
The patch implements the OPAL rtc driver that binds with the rtc
driver subsystem. The driver uses the platform device infrastructure
to probe the rtc device and register it to rtc class framework. The
'wakeup' is supported depending upon the property
Hi Michael,
>> Currently, we can't call opal wrappers from modules when using the LE
>> ABIv2, which requires a TOC init.
>
> What happens if we try? Build failure or run time bug?
We'll get an arbitrary memory dereference (two, actually) in the opal
wrappers, when we try to load the opal entry
Hi,
The value in QE UCC ethernet interfaces shows random values:
# ethtool -S eth0
NIC statistics:
...
rx-ip-checksum-errors: 3933892214
The problem is located in a mismatch between the rx_fw_stat_gstrings fields
- used in ucc_geth_ethtool - and the ucc_geth_rx_firmware_statistics_pra
On Wed, Oct 22, 2014 at 03:09:30PM +0100, Emil Medve wrote:
> Portals are used by software running on processor cores, accelerators and
> network interfaces to communicate with the BMan
What exactly is a portal?
Is it a region of shared memory? A device?
I only received emails 2 and 3 of this se
The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
BMan supports hardware allocation and deallocation of buffers belonging to
pools originally created by software with configurable depletion thresholds.
This binding covers the CCSR space programming model
Signed-off-by:
Portals are used by software running on processor cores, accelerators and
network interfaces to communicate with the QMan
Signed-off-by: Emil Medve
Change-Id: I29764fa8093b5ce65460abc879446795c50d7185
---
.../bindings/powerpc/fsl/qman-portals.txt | 151 +
1 file chan
On Wed, Oct 22, 2014 at 03:09:31PM +0100, Emil Medve wrote:
> The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA).
> QMan supports queuing and QoS scheduling of frames to CPUs, network interfaces
> and DPAA logic modules, maintains packet ordering within flows. Besides
> pro
Signed-off-by: Emil Medve
Change-Id: If76cd705a01813abe53396c1486bc13c4289ee92
---
arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi | 7 +++
arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi | 7 +++
2 files changed, 14 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen1.dtsi
Portals are used by software running on processor cores, accelerators and
network interfaces to communicate with the BMan
Signed-off-by: Emil Medve
Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95
---
.../bindings/powerpc/fsl/bman-portals.txt | 50 ++
1 file chan
The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA).
QMan supports queuing and QoS scheduling of frames to CPUs, network interfaces
and DPAA logic modules, maintains packet ordering within flows. Besides
providing flow-level queuing, is also responsible for congestion manage
Signed-off-by: Emil Medve
Change-Id: I25ce24a25862b4ca460164159867abefe00ccdd1
---
arch/powerpc/boot/dts/b4860emu.dts | 4 +-
arch/powerpc/boot/dts/fsl/b4420si-post.dtsi| 28 +
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi| 28 +
arch/powerpc/boot/dts/fsl/p2041s
Signed-off-by: Emil Medve
Change-Id: I7950afa9650d15ec7ce2cca89bb2a1e38586d4a5
---
Documentation/devicetree/bindings/clock/qoriq-clock.txt | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
b/Documentatio
On Mon, Oct 20, 2014 at 09:12:24PM -0700, Guenter Roeck wrote:
> pm_power_off is defined for all architectures. Move it to common code.
>
> Have all architectures call do_kernel_power_off instead of pm_power_off.
> Some architectures point pm_power_off to machine_power_off. For those,
> call do_k
On Wed, Oct 22, 2014 at 05:31:36PM +0200, Ralf Baechle wrote:
> On Mon, Oct 20, 2014 at 09:12:24PM -0700, Guenter Roeck wrote:
>
> > pm_power_off is defined for all architectures. Move it to common code.
> >
> > Have all architectures call do_kernel_power_off instead of pm_power_off.
> > Some arc
Split the device_control callback of the Freescale Elo DMA driver to make use
of the newly introduced callbacks, that will eventually be used to retrieve
slave capabilities.
While we're at it, remove the useless prep_sg callback.
Signed-off-by: Maxime Ripard
---
drivers/dma/fsldma.c | 91 ++
On 10/21/2014 09:37 PM, Michael Ellerman wrote:
The generic Linux framework to power off the machine is a function pointer
called pm_power_off. The trick about this pointer is that device drivers can
potentially implement it rather than board files.
Today on powerpc we set pm_power_off to invoke
From: Christophe Leroy
Date: Wed, 22 Oct 2014 09:05:47 +0200 (CEST)
> After interface restart (eg: after link disconnection/reconnection), the
> bridge
> function doesn't work anymore. This is due to the promiscuous mode being
> cleared
> by the restart.
>
> The mac-fcc already includes code t
Hello Mark,
Thanks for having a look at this
On 10/22/2014 09:29 AM, Mark Rutland wrote:
> On Wed, Oct 22, 2014 at 03:09:30PM +0100, Emil Medve wrote:
>> Portals are used by software running on processor cores, accelerators and
>> network interfaces to communicate with the BMan
>
> What exactly
Hello Mark,
On 10/22/2014 09:37 AM, Mark Rutland wrote:
> On Wed, Oct 22, 2014 at 03:09:31PM +0100, Emil Medve wrote:
>> The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA).
>> QMan supports queuing and QoS scheduling of frames to CPUs, network
>> interfaces
>> and DPAA l
On Fri, 17 Oct 2014 10:08:06 +0530 "Aneesh Kumar K.V"
wrote:
> Update generic gup implementation with powerpc specific details.
> On powerpc at pmd level we can have hugepte, normal pmd pointer
> or a pointer to the hugepage directory.
>
> ...
>
> --- a/arch/arm/include/asm/pgtable.h
> +++ b/ar
On Wed, Oct 15, 2014 at 11:07:12AM +0800, Yijing Wang wrote:
> Use MSI chip framework instead of arch MSI functions to configure
> MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
This needs slightly more detail. You're using the MSI chip framework
"instead of arch MSI functi
On 2014/10/23 7:53, Bjorn Helgaas wrote:
> On Wed, Oct 15, 2014 at 11:07:12AM +0800, Yijing Wang wrote:
>> Use MSI chip framework instead of arch MSI functions to configure
>> MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
>
> This needs slightly more detail. You're using t
On Wed, Oct 15, 2014 at 11:06:50AM +0800, Yijing Wang wrote:
> Commit 0e4ccb1505a9 ("PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()")
> introduced two __weak arch functions arch_msix_mask_irq() and
> arch_msi_mask_irq() to work around a bug when running xen in x86.
> These two functions made m
Andrew Morton writes:
> On Fri, 17 Oct 2014 10:08:06 +0530 "Aneesh Kumar K.V"
> wrote:
>
>> Update generic gup implementation with powerpc specific details.
>> On powerpc at pmd level we can have hugepte, normal pmd pointer
>> or a pointer to the hugepage directory.
>>
>> ...
>>
>> --- a/arch/
On 2014/10/23 12:25, Bjorn Helgaas wrote:
> On Wed, Oct 15, 2014 at 11:06:50AM +0800, Yijing Wang wrote:
>> Commit 0e4ccb1505a9 ("PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()")
>> introduced two __weak arch functions arch_msix_mask_irq() and
>> arch_msi_mask_irq() to work around a bug when r
On Wed, Oct 15, 2014 at 11:06:53AM +0800, Yijing Wang wrote:
> Save msi chip in pci_sys_data instead of assign
> msi chip to every pci bus in .add_bus().
>
> Signed-off-by: Yijing Wang
> ---
> drivers/pci/host/pci-tegra.c | 13 +++--
> 1 files changed, 3 insertions(+), 10 deletions(-)
On Wed, Oct 15, 2014 at 11:06:52AM +0800, Yijing Wang wrote:
> Saving msi chip in pci_sys_data can make pci bus and
> devices don't need to know msi chip detail, it also
> make pci enumeration code be decoupled from msi chip.
> In fact, all pci devices under the same pci hostbridge
> share same msi
On Wed, Oct 15, 2014 at 11:06:57AM +0800, Yijing Wang wrote:
> MSI chip will be saved in pci_sys_data, now we can
> clean up pcibios_add_bus() and pcibios_remove_bus()
> in arm, and use pci_find_msi_chip() to get msi chip
> in core MSI code.
>
> Signed-off-by: Yijing Wang
> ---
> arch/arm/includ
On Wed, Oct 15, 2014 at 11:06:58AM +0800, Yijing Wang wrote:
> Now msi chip is saved in pci_sys_data in arm,
> we could clean the bus->msi assignment in
> pci core.
>
> Signed-off-by: Yijing Wang
> CC: Thierry Reding
> CC: Thomas Petazzoni
> ---
> drivers/pci/probe.c |1 -
> 1 files change
On Wed, Oct 15, 2014 at 11:06:48AM +0800, Yijing Wang wrote:
> Now there are a lot of weak arch functions in MSI code.
> Thierry Reding Introduced MSI chip framework to configure MSI/MSI-X in arm,
> that's a better solution than overriding lots of existing weak arch
> functionsin.
> This series u
On 2014/10/23 13:18, Bjorn Helgaas wrote:
> On Wed, Oct 15, 2014 at 11:06:53AM +0800, Yijing Wang wrote:
>> Save msi chip in pci_sys_data instead of assign
>> msi chip to every pci bus in .add_bus().
>>
>> Signed-off-by: Yijing Wang
>> ---
>> drivers/pci/host/pci-tegra.c | 13 +++--
>>
>> diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
>> index 22e413c..f11108c 100644
>> --- a/drivers/pci/msi.c
>> +++ b/drivers/pci/msi.c
>> @@ -35,6 +35,9 @@ int __weak arch_setup_msi_irq(struct pci_dev *dev, struct
>> msi_desc *desc)
>> struct msi_chip *chip = dev->bus->msi;
>> int
>> /*
>> * Swizzle the device pin each time we cross a bridge. If a platform does
>> * not provide a swizzle function, we perform the standard PCI swizzling.
>> @@ -478,8 +464,6 @@ static void pcibios_init_hw(struct device *parent,
>> struct hw_pci *hw,
>> sys->swizzle = hw->swi
On 2014/10/23 13:41, Bjorn Helgaas wrote:
> On Wed, Oct 15, 2014 at 11:06:58AM +0800, Yijing Wang wrote:
>> Now msi chip is saved in pci_sys_data in arm,
>> we could clean the bus->msi assignment in
>> pci core.
>>
>> Signed-off-by: Yijing Wang
>> CC: Thierry Reding
>> CC: Thomas Petazzoni
>> --
39 matches
Mail list logo
