[ summary: the PCI driver change of mine looks innocent yet
raises questions (not for the current situation, but in the
face of potential future changes); these concerns were not
introduced by me but were "inherited" from the former
implementation, as I understand it
let's drop my patch
On Tue, Nov 19, 2013 at 05:04:14PM -0500, Jason Baron wrote:
> On 11/19/2013 02:09 AM, Ingo Molnar wrote:
> >
> > * Jason Baron wrote:
> >
> >> On 11/18/2013 05:30 PM, Andrew Morton wrote:
> >>> On Mon, 18 Nov 2013 21:04:36 + (GMT) Jason Baron
> >>> wrote:
> >>>
> The panic_timeout va
> -Original Message-
> From: iommu-boun...@lists.linux-foundation.org [mailto:iommu-
> boun...@lists.linux-foundation.org] On Behalf Of Alex Williamson
> Sent: Thursday, November 21, 2013 12:17 AM
> To: Bhushan Bharat-R65777
> Cc: linux-...@vger.kernel.org; ag...@suse.de; Yoder Stuart-B08
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Thursday, November 21, 2013 12:17 AM
> To: Bhushan Bharat-R65777
> Cc: j...@8bytes.org; bhelg...@google.com; ag...@suse.de; Wood Scott-B07421;
> Yoder Stuart-B08248; io...@lists.linux-foundation.org;
On Wed, Nov 20, 2013 at 04:18:54PM +1100, Michael Neuling wrote:
> The VSX MSR bit in the user context indicates if the context contains VSX
> state. Currently we set this when the process has touched VSX at any stage.
>
> Unfortunately, if the user has not provided enough space to save the VSX
On Wed, Nov 20, 2013 at 10:14:59PM +1100, Anton Blanchard wrote:
> On little endian builds call H_SET_MODE so exceptions have the
> correct endianness. We need to reset the endian during kexec
> so do that in the MMU hashtable clear callback.
>
> Signed-off-by: Anton Blanchard
> ---
> arch/power
On Wed, Nov 20, 2013 at 10:15:00PM +1100, Anton Blanchard wrote:
> From: Rusty Russell
>
> Little endian ppc64 is getting an exciting new ABI. This is reflected
> by the bottom two bits of e_flags in the ELF header:
>
> 0 == legacy binaries (v1 ABI)
> 1 == binaries using the old ABI
On Wed, Nov 20, 2013 at 10:15:01PM +1100, Anton Blanchard wrote:
> From: Rusty Russell
>
> We leave it at zero (though it could be 1) for old tasks.
There's no issue with a v1 binary producing a v0 core dump?
I can't think of why there would be, if they are equivalent.
cheers
_
On Wed, Nov 20, 2013 at 10:15:05PM +1100, Anton Blanchard wrote:
> With the little endian support merged, we can add the
> CONFIG_CPU_LITTLE_ENDIAN kernel config option.
This appears to do nothing, but the Makefile bits were already added in
commit d72b080 "powerpc: Add ability to build little end
On Thu, Nov 21, 2013 at 02:33:34PM +1100, Anton Blanchard wrote:
>
> Hi,
>
> > After merging the final tree, today's linux-next build (powerpc
> > allyesconfig) failed like this:
> >
> > :1:0: error: -mcall-aixdesc must be big endian
>
> Urgh, allyesconfig is building an LE kernel. Ian: do we n
On 11/21/2013 12:41 AM, Scott Wood wrote:
On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote:
CONFIG_ALTIVEC is always enabled for CoreNet64.
In the defconfig perhaps, but this isn't a generally true statement.
Yes, but I think we should avoid this probable scenario :)
And if we select
Dear Ralf Baechle,
On Thu, 21 Nov 2013 18:39:33 +0100, Ralf Baechle wrote:
> On Wed, Nov 20, 2013 at 10:50:43AM +0800, Richard Zhu wrote:
>
> Looking good,
>
> Acked-by: Ralf Baechle
I think this patch was mistakenly sent by Richard Zhu. It is already
part of mainline since 3.12:
http://git.ke
On Thu, Nov 21, 2013 at 10:17:55AM +0800, Liu Ping Fan wrote:
> For 64K page, we waste half of the pte_t page. With this patch, after
> changing PGD_INDEX_SIZE from 12 to 11, PTE_INDEX_SIZE from 8 to 9,
> we can improve the usage of pte_t page and shrink the continuous phys
> size for pgd_t.
>
> S
Carlos O'Donell wrote:
> On 11/21/2013 06:33 AM, Michael Ellerman wrote:
> > On Wed, Nov 20, 2013 at 04:18:54PM +1100, Michael Neuling wrote:
> >> The VSX MSR bit in the user context indicates if the context contains VSX
> >> state. Currently we set this when the process has touched VSX at any
On Thu, 2013-11-21 at 16:45 +0100, Cedric Le Goater wrote:
> > - fbdev *generally* assume native endian framebuffer, but of course
> > under qemu today, the adapter will use a big endian frame buffer
> > aperture. You can compile in support for foreign endian but I don't know
> > how that actually
On 11/21/2013 06:33 AM, Michael Ellerman wrote:
> On Wed, Nov 20, 2013 at 04:18:54PM +1100, Michael Neuling wrote:
>> The VSX MSR bit in the user context indicates if the context contains VSX
>> state. Currently we set this when the process has touched VSX at any stage.
>>
>> Unfortunately, if the
On 11/21/2013 06:16 AM, Michael Ellerman wrote:
> On Tue, Nov 19, 2013 at 05:04:14PM -0500, Jason Baron wrote:
>> On 11/19/2013 02:09 AM, Ingo Molnar wrote:
>>>
>>> * Jason Baron wrote:
>>>
On 11/18/2013 05:30 PM, Andrew Morton wrote:
> On Mon, 18 Nov 2013 21:04:36 + (GMT) Jason Baron
Hi,
On 11/20/2013 11:50 PM, Benjamin Herrenschmidt wrote:
> On Thu, 2013-10-31 at 10:36 +0100, Cédric Le Goater wrote:
>> The "screen" properties : depth, width, height, linebytes need
>> to be converted to the host endian order when read from the device
>> tree.
>>
>> Signed-off-by: Cédric Le Goa
On Fri, 2013-11-22 at 09:11 +1100, Paul Mackerras wrote:
> On Thu, Nov 21, 2013 at 10:17:55AM +0800, Liu Ping Fan wrote:
> > For 64K page, we waste half of the pte_t page. With this patch, after
> > changing PGD_INDEX_SIZE from 12 to 11, PTE_INDEX_SIZE from 8 to 9,
> > we can improve the usage of p
And in flush_hugetlb_page(), don't check whether vma is NULL after
we've already dereferenced it.
This was found by Dan using static analysis as described here:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2013-November/113161.html
We currently get away with this because the callers that curre
On Thu, 2013-11-21 at 12:22 +1100, Alexey Kardashevskiy wrote:
> On 11/21/2013 07:57 AM, Alex Williamson wrote:
> > On Wed, 2013-11-20 at 16:18 +1100, Alexey Kardashevskiy wrote:
> >> In addition to the external VFIO user API, a VFIO KVM device
> >> has been introduced recently.
> >>
> >> sPAPR TCE
On 11/21/2013 05:21 PM, Michael Neuling wrote:
>>> What about the 64-bit code? I don't know the code but it appears at a
>>> glance to
>>> have the same bug.
>>
>> It doesn't happen with 64-bit code because there the context contains
>> a sigcontext which on ppc64 has vmx_reserve to store the en
On Wed, Nov 20, 2013 at 10:50:43AM +0800, Richard Zhu wrote:
Looking good,
Acked-by: Ralf Baechle
Nevertheless I'd again like to express that I'm not that fond of of the
increasing number of weak functions in the kernel. In the old days
things were such that when an a platform didn't provice a
On Thu, Nov 21, 2013 at 08:08:04PM +0100, Thomas Petazzoni wrote:
> I think this patch was mistakenly sent by Richard Zhu. It is already
> part of mainline since 3.12:
Explains the deja vue ...
Ralf
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.oz
Drop it now :)
However, it may be nice to keep the A2 stuff until BGQ EOLs
-jx
On Wed, Nov 20, 2013 at 8:40 PM, Michael Neuling wrote:
> chroma_defconfig is horribly broken currently, so add a bunch of
> #includes to fix it.
>
> Signed-off-by: Michael Neuling
> ---
> So when are we dropping a
On Thu, Nov 21, 2013 at 04:21:30PM -0500, Jason Baron wrote:
> On 11/21/2013 06:16 AM, Michael Ellerman wrote:
> > On Tue, Nov 19, 2013 at 05:04:14PM -0500, Jason Baron wrote:
> >> On 11/19/2013 02:09 AM, Ingo Molnar wrote:
> >>>
> >>> * Jason Baron wrote:
> >>>
> On 11/18/2013 05:30 PM, Andr
On Fri, 2013-11-22 at 10:46 +1100, Benjamin Herrenschmidt wrote:
> On Fri, 2013-11-22 at 09:11 +1100, Paul Mackerras wrote:
> > On Thu, Nov 21, 2013 at 10:17:55AM +0800, Liu Ping Fan wrote:
> > > For 64K page, we waste half of the pte_t page. With this patch, after
> > > changing PGD_INDEX_SIZE fro
The new IBM Akebono board has a PPC476GTR SoC with an AHCI compliant
SATA controller. This patch adds a compatible property for the new SoC
to the AHCI platform driver.
Signed-off-by: Alistair Popple
Cc: linux-...@vger.kernel.org
---
drivers/ata/ahci_platform.c |1 +
1 file changed, 1 insert
The IBM Akebono board is a development board for the new PPC476GTR
system on chip (SoC).
Changes from V1:
* Update device-tree compatible strings to reflect the name of the
SoC rather than the board when those components are integrated into
the SoC.
* Updates to allow the new EMAC PHY inte
This patch adds a SDHCI platform driver for the new IBM PPC476GTR SoC
which is on the Akebono board.
Signed-off-by: Alistair Popple
Cc: Chris Ball
Cc: linux-...@vger.kernel.org
---
drivers/mmc/host/Kconfig | 12
drivers/mmc/host/Makefile |1 +
drivers/mmc/host/
The IBM PPC476GTR SoC that is used on the Akebono board uses a
different ethernet PHY interface that has wake on lan (WOL) support
with the IBM emac. This patch adds support to the IBM emac driver for
this new PHY interface.
At this stage the wake on lan functionality has not been implemented.
Si
The IBM Akebono board uses the PPC476GTR SoC which has a OHCI
compliant USB host interface. This patch adds support for it to the
OHCI platform driver.
As we use device tree to pass platform specific data instead of
platform data we remove the check for platform data and instead
provide reasonable
Currently the ppc-of driver uses the compatibility string
"usb-ehci". This means platforms that use device-tree and implement an
EHCI compatible interface have to either use the ppc-of driver or add
a compatible line to the ehci-platform driver. It would be more
appropriate for the platform driver
On Thu, 2013-11-21 at 16:59 +0800, "“tiejun.chen”" wrote:
> On 11/21/2013 12:41 AM, Scott Wood wrote:
> > On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote:
> >> +# Altivec and Spe options not allowed with e500mc64 in GCC.
> >> +ifeq ($(call cc-option-yn,-mcpu=e500mc64),n)
> >> obj-$(CONFIG_AL
The IBM Akebono code uses the same initialisation functions as the
earlier Currituck board. Rather than create a copy of this code for
Akebono we will instead integrate support for it into the same file as
the Currituck code.
This patch renames the board support file and updates the 476FPE PCI
cod
The PPC476GTR SoC supports message signalled interrupts (MSI) by writing
to special addresses within the High Speed Transfer Assist (HSTA) module.
This patch adds support for PCI MSI with a new system device. The DMA
window is also updated to allow access to the entire 42-bit address range
to allo
The VSX MSR bit in the user context indicates if the context contains
VSX state. Unfortunately, if the user has not provided enough space to
save the VSX state, we can't save it but we currently still set the MSR
VSX bit.
This patch changes this to clear the MSR VSX bit when the user doesn't
prov
On Thu, 2013-11-21 at 13:43 -0700, Alex Williamson wrote:
> On Thu, 2013-11-21 at 11:20 +, Bharat Bhushan wrote:
> >
> > > -Original Message-
> > > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > > Sent: Thursday, November 21, 2013 12:17 AM
> > > To: Bhushan Bharat-R65777
If CONFIG_ALTIVEC is enabled for CoreNet64, and if we also
select CONFIG_E{5,6}500_CPU this may introduce -mcpu=e500mc64
into $CFLAGS. But Altivec option not allowed with e500mc64,
then some compiling errors occur like this:
CC arch/powerpc/lib/xor_vmx.o
arch/powerpc/lib/xor_vmx.c:1
On Fri, 2013-11-15 at 23:01 +0530, Hari Bathini wrote:
> When CONFIG_SPARSEMEM_VMEMMAP option is used in kernel, makedumpfile fails
> to filter vmcore dump as it fails to do vmemmap translations. So far
> dump filtering on ppc64 never had to deal with vmemmap addresses seperately
> as vmemmap regio
Hi Scott,
Do you have any comments about this patch? If not, please pick it up.
Thanks,
Yuantian
> -Original Message-
> From: Tang Yuantian-B29983
> Sent: 2013年11月20日 星期三 17:05
> To: ga...@kernel.crashing.org
> Cc: devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> mark.rutl...@
On Thu, 2013-11-21 at 14:47 -0600, Scott Wood wrote:
> On Thu, 2013-11-21 at 13:43 -0700, Alex Williamson wrote:
> > On Thu, 2013-11-21 at 11:20 +, Bharat Bhushan wrote:
> > >
> > > > -Original Message-
> > > > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > > > Sent: Thu
On Thu, 2013-11-21 at 11:20 +, Bharat Bhushan wrote:
>
> > -Original Message-
> > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > Sent: Thursday, November 21, 2013 12:17 AM
> > To: Bhushan Bharat-R65777
> > Cc: j...@8bytes.org; bhelg...@google.com; ag...@suse.de; Wood Sco
This patch adds support for the IBM Akebono board.
Signed-off-by: Alistair Popple
---
.../devicetree/bindings/powerpc/4xx/akebono.txt| 54 +++
arch/powerpc/boot/Makefile |3 +
arch/powerpc/boot/dcr.h|4 +
arch/powerpc/boot/dts/ake
On 11/21/2013 07:53 PM, Carlos O'Donell wrote:
> The addition of the *context functions in glibc for 64-bit power
> happened in 2003 by glibc commit 609b4783, with the mcontext_t
> being expanded to include
... support for VMX state via `long vmx_reserve[NVRREG+NVRREG+1];'.
Cheers,
Carlos.
On Wed, 2013-11-20 at 18:32 -0600, Scott Wood wrote:
> For userspace value setting, it looks like gpiolib blocks the write if
> the pin if FLAG_IS_OUT is set. This suggests that this is an error
> condition for other uses as well. Though, I notice that
> mpc8xxx_gpio_dir_out() calls gpio_set() be
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