> -Original Message-
> From: Bhushan Bharat-R65777
> Sent: Tuesday, August 06, 2013 6:42 AM
> To: Wood Scott-B07421
> Cc: Benjamin Herrenschmidt; ag...@suse.de; kvm-...@vger.kernel.org;
> k...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH 5/6 v2] kvm: powerpc: booke
On Mon, Aug 05, 2013 at 09:38:45AM -0600, Bjorn Helgaas wrote:
> [+cc linuxppc-dev]
>
> On Mon, Aug 5, 2013 at 5:17 AM, Leon Ravich wrote:
> > Hi all ,
> > I am trying to upgrade ours embedded device (freescale powerPC P2020 cpu)
> > linux kernel , till now we used 2.6.32 I am trying to upgrade t
Hi,
On 31/07/13 19:04, Christoph Lameter wrote:
> On Wed, 31 Jul 2013, Wladislav Wiebe wrote:
>
>> Thanks for the point, do you plan to make kmalloc_large available for extern
>> access in a separate mainline patch?
>> Since kmalloc_large is statically defined in slub_def.h and when including
>
This commit adds a powerpc subdirectory to tools/testing/selftests,
for tests that are powerpc specific.
On other architectures nothing is built. The makefile supports cross
compilation if the user sets ARCH and CROSS_COMPILE.
Signed-off-by: Michael Ellerman
---
v3: Add tags
v2: No change
tool
This commit adds support code used by upcoming powerpc tests.
Signed-off-by: Michael Ellerman
---
v3: Print when the child dies due to a signal
v2: Put back the SIGALARM handler to make the hang logic work.
tools/testing/selftests/powerpc/harness.c | 105 ++
tools/te
On Tue, Aug 06, 2013 at 10:26:18AM +0300, Leon Ravich wrote:
> Hi Johannes
> no panic just reboot.
> it is not the first read, it takes few minutes of work with pcie to reboot.
>
Ah, OK. Unfortunately I can't really help you then.
Have you looked up the error values from the EDAC driver?
If it's
This commit adds a test of instruction counting using the PMU on powerpc.
Although the bulk of the code is architecture agnostic, the code needs to
run a precisely sized loop which is implemented in assembler.
Signed-off-by: Michael Ellerman
---
v2,3: No change
tools/testing/selftests/powerpc/
Thanks Bjorn.
1) If I understand it right this patch only removes the "pci
:00:00.0: ignoring class 0x0b2000 (doesn't
match header type 01)" message , don't care about it , had it before .
2) regarding the comparing of printouts:
kernel 3.8.13:
[ 37.908846] pci_bus :00: scanning bus
Hi Johannes
no panic just reboot.
it is not the first read, it takes few minutes of work with pcie to reboot.
On 6 August 2013 10:07, Johannes Thumshirn wrote:
> On Mon, Aug 05, 2013 at 09:38:45AM -0600, Bjorn Helgaas wrote:
>> [+cc linuxppc-dev]
>>
>> On Mon, Aug 5, 2013 at 5:17 AM, Leon Ravic
>> Have you looked up the error values from the EDAC driver?
[ 37.961580] PCIE error(s) detected
[ 37.964971] PCIE ERR_DR register: 0x0002
=> Invalid CONFIG_ADDR/PEX_CONFIG_DATA access detected
[ 37.969229] PCIE ERR_CAP_STAT register: 0x0041 =>
Transaction originated
These patches passed the build test with the following configurations.
ppc40x_defconfig
ppc64e_defconfig
ppc64_defconfig
mpc85xx_defconfig
mpc85xx_smp_defconfig
corenet32_smp_defconfig
corenet64_smp_defconfig
ppc44x_defconfig
m
In function flush_icache_range(), we use cpu_has_feature() to test
the feature bit of CPU_FTR_COHERENT_ICACHE. But this seems not optimal
for two reasons:
a) For ppc32, the function __flush_icache_range() already do this
check with the macro END_FTR_SECTION_IFSET.
b) Compare with the cpu_has_
And now the function flush_icache_range() is just a wrapper which
only invoke the function __flush_icache_range() directly. So we
don't have reason to keep it anymore.
Signed-off-by: Kevin Hao
---
arch/powerpc/include/asm/cacheflush.h | 7 +--
arch/powerpc/kernel/misc_32.S | 2 +-
ar
We don't need to flush the dcache and invalidate the icache on the
CPU which has CPU_FTR_COHERENT_ICACHE set.
Signed-off-by: Kevin Hao
---
arch/powerpc/kernel/misc_64.S | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index a781
On Tue, 2013-08-06 at 18:23 +0800, Kevin Hao wrote:
> In function flush_icache_range(), we use cpu_has_feature() to test
> the feature bit of CPU_FTR_COHERENT_ICACHE. But this seems not optimal
> for two reasons:
> a) For ppc32, the function __flush_icache_range() already do this
> check with
On Tue, 2013-08-06 at 18:23 +0800, Kevin Hao wrote:
> We don't need to flush the dcache and invalidate the icache on the
> CPU which has CPU_FTR_COHERENT_ICACHE set.
Actually we probably need an isync...
Ben.
> Signed-off-by: Kevin Hao
> ---
> arch/powerpc/kernel/misc_64.S | 3 +++
> 1 file ch
Patch attempts to improve the performace of __arch_hweight functions by
making them inline instead of current out of line implementation.
Testcase is to disable/enable SMT on a large (192 thread) POWER7 lpar.
Program used for SMT disable/enable is "ppc64_cpu" with "--smt=[off/on]"
option. Here are
"E" bit in MAS2 bit indicates whether the page is accessed
in Little-Endian or Big-Endian byte order.
There is no reason to stop guest setting "E", so allow him."
Signed-off-by: Bharat Bhushan
---
v2->v3
- no change
v1->v2
- no change
arch/powerpc/kvm/e500.h |2 +-
1 files changed, 1 inse
For booke3e _PAGE_ENDIAN is not defined. Infact what is defined
is "_PAGE_LENDIAN" which is wrong and should be _PAGE_ENDIAN.
There are no compilation errors as
arch/powerpc/include/asm/pte-common.h defines _PAGE_ENDIAN to 0
as it is not defined anywhere.
Signed-off-by: Bharat Bhushan
---
v2->v3
From: Bharat Bhushan
First patch is a typo fix where book3e define _PAGE_LENDIAN while it should be
defined as _PAGE_ENDIAN. This seems to show that this is never exercised :-)
Second and third patch is to allow guest controlling "G"-Guarded and
"E"-Endian TLB attributes respectively.
Fourth an
"G" bit in MAS2 indicates whether the page is Guarded.
There is no reason to stop guest setting "G", so allow him.
Signed-off-by: Bharat Bhushan
---
v2->v3
- no change
v1->v2
- no change
arch/powerpc/kvm/e500.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/pow
Linux pte search functions find_linux_pte_or_hugepte() and
find_linux_pte() have nothing specific to 64bit anymore.
So they are move from pgtable-ppc64.h to asm/pgtable.h
Signed-off-by: Bharat Bhushan
---
v2->v3
- no change
v1->v2
- This is a new change in this version
arch/powerpc/include/a
KVM uses same WIM tlb attributes as the corresponding qemu pte.
For this we now search the linux pte for the requested page and
get these cache caching/coherency attributes from pte.
Signed-off-by: Bharat Bhushan
---
v2->v3
- setting pgdir before kvmppc_fix_ee_before_entry() on vcpu_run
- Align
lookup_linux_pte() was searching for a pte and also sets access
flags is writable. This function now searches only pte while
access flag setting is done explicitly.
This pte lookup is not kvm specific, so moved to common code (asm/pgtable.h)
My Followup patch will use this on booke.
Signed-off-by
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, August 06, 2013 12:49 AM
> To: Bhushan Bharat-R65777
> Cc: Benjamin Herrenschmidt; Wood Scott-B07421; ag...@suse.de; kvm-
> p...@vger.kernel.org; k...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH 5/6 v
On Tue, 6 Aug 2013, Wladislav Wiebe wrote:
> ok, just saw in slab/for-linus branch that those stuff is reverted again..
No that was only for the 3.11 merge by Linus. The 3.12 patches have not
been put into pekkas tree.
___
Linuxppc-dev mailing list
Linu
This patchset adds support for building a 64bit PowerPC little
endian kernel.
binutils and gcc support (powerpcle/powerpc64le) is already
upstream. For gcc you can use gcc tip, or for the less adventurous
the gcc 4.8 branch works too.
QEMU patches to boot a little endian kernel will be posted ove
p_toc is an 8 byte relative offset to the TOC that we place in the
text section. This means it is only 4 byte aligned where it should
be 8 byte aligned. Add an explicit alignment.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/head_64.S | 1 +
1 file changed, 1 insertion(+)
diff --git a
Not having parentheses around a macro is asking for trouble.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/reg.h | 8
arch/powerpc/include/asm/reg_booke.h | 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/ar
We always use VMX loads and stores to manage the high 32
VSRs. Remove these unused macros.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/ppc_asm.h | 13 -
1 file changed, 13 deletions(-)
diff --git a/arch/powerpc/include/asm/ppc_asm.h
b/arch/powerpc/include/asm/ppc_as
Address some of the trivial sparse warnings in arch/powerpc.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/legacy_serial.c | 2 +-
arch/powerpc/kernel/pci-common.c| 4 ++--
arch/powerpc/kernel/pci_64.c| 2 +-
arch/powerpc/kernel/setup_64.c
Simplify things by putting all the 32bit and 64bit defines
together instead of in two spots.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/uapi/asm/elf.h | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/include/uapi/asm/elf.h
b/arch
plpar_get_term_char is only used once and just adds a layer
of complexity to H_GET_TERM_CHAR. plpar_put_term_char isn't
used at all so we can remove it.
Signed-off-by: Anton Blanchard
---
arch/powerpc/platforms/pseries/hvconsole.c | 12 +---
arch/powerpc/platforms/pseries/plpar_wrap
Fix a sparse warning about force_32bit_msi being a one bit bitfield.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/pci-bridge.h | 2 +-
arch/powerpc/kernel/pci_64.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/pci-bridge.h
From: Ian Munsie
On PowerPC the device tree is always big endian, but the CPU could be
either, so add be32_to_cpu where appropriate and change the types of
device tree data to __be32 etc to allow sparse to locate endian issues.
Signed-off-by: Ian Munsie
Acked-by: Grant Likely
---
arch/powerpc
Although the shared_proc field in the lppaca works today, it is
not architected. A shared processor partition will always have a non
zero yield_count so use that instead. Create a wrapper so users
don't have to know about the details.
In order for older kernels to continue to work on KVM we need
t
From: Alistair Popple
Signed-off-by: Alistair Popple
---
arch/powerpc/kernel/prom.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index d072f67..987a4fb 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/k
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/setup_64.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index b3b5fd3..00dfcc5 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/ke
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/rtas.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 80b5ef4..98b26af 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerp
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/setup-common.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/setup-common.c
b/arch/powerpc/kernel/setup-common.c
index 63d051f..ee0e055 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arc
RTAS expects arguments in the call buffer to be big endian so we
need to byteswap on little endian builds
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/rtas.h | 8
arch/powerpc/kernel/rtas.c | 38 +++---
2 files changed, 23 insertions(
Normally when we haven't implemented an alignment handler for
a load or store instruction the process will be terminated.
The alignment handler uses the DSISR (or a pseudo one) to locate
the right handler. Unfortunately ldbrx and stdbrx overlap lfs and
stfs so we incorrectly think ldbrx is an lfs
From: Alistair Popple
Signed-off-by: Alistair Popple
---
arch/powerpc/kernel/setup-common.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/setup-common.c
b/arch/powerpc/kernel/setup-common.c
index ee0e055..3d261c0 100644
--- a/arch/powerpc/kernel
Signed-off-by: Anton Blanchard
---
arch/powerpc/sysdev/xics/xics-common.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/xics/xics-common.c
b/arch/powerpc/sysdev/xics/xics-common.c
index 9049d9f..fe0cca4 100644
--- a/arch/powerpc/sysdev/xics/xi
Fix a couple of sparse warnings.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/time.c| 2 +-
arch/powerpc/sysdev/xics/icp-native.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 65ab9e9..c8
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/cacheinfo.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
index 9262cf2..6549327 100644
--- a/arch/powerpc/kernel/cacheinfo.c
+++ b/arch/powe
We pass dma_window to of_parse_dma_window as a void * and then
run through hoops to cast it back to a u32 array. In the process
we lose endian annotation.
Simplify it by just passing a __be32 * down.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/prom.h| 5 +++--
arch/powe
From: Benjamin Herrenschmidt
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/prom_init.c | 253 +++-
1 file changed, 147 insertions(+), 106 deletions(-)
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc
Signed-off-by: Anton Blanchard
---
drivers/tty/hvc/hvc_vio.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/hvc/hvc_vio.c b/drivers/tty/hvc/hvc_vio.c
index 0c62980..c791b18 100644
--- a/drivers/tty/hvc/hvc_vio.c
+++ b/drivers/tty/hvc/hvc_vio.c
@@ -404,7 +404,7
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/pci-common.c | 6 +++---
arch/powerpc/kernel/pci_of_scan.c | 23 +--
2 files changed, 16 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 22fe401..7d7
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/vio.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 31875a6..78a3506 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/pci_dn.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index df03844..1f61fab 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc
From: Alistair Popple
Signed-off-by: Alistair Popple
---
arch/powerpc/kernel/legacy_serial.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/legacy_serial.c
b/arch/powerpc/kernel/legacy_serial.c
index af1c63f..179beea 100644
--- a/arch/powerpc/kern
From: Alistair Popple
The device tree is big endian so make sure we byteswap on little
endian. We assume any pHyp calls also return big endian results in
memory.
Signed-off-by: Alistair Popple
---
arch/powerpc/mm/numa.c | 100 +
1 file changed, 5
Alistair noticed we got a SIGILL on userspace mfpvr instructions.
Remove the little endian check in the emulation code, it is
probably there to protect against the old pseudo little endian
implementations but doesn't make sense for real little endian.
Signed-off-by: Anton Blanchard
---
arch/pow
The lppaca, slb_shadow and dtl_entry hypervisor structures are
big endian, so we have to byte swap them in little endian builds.
LE KVM hosts will also need to be fixed but for now add an #error
to remind us.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/asm-compat.h |
Add little endian support for demuxing SMP IPIs
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/smp.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 98822400..bcdb706 100644
--- a/arch/po
Signed-off-by: Anton Blanchard
---
arch/powerpc/platforms/pseries/hvconsole.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/hvconsole.c
b/arch/powerpc/platforms/pseries/hvconsole.c
index aa0aa37..ef6d59a 100644
--- a/arch/powerpc/plat
We need to set ELF_DATA correctly on LE coredumps.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/uapi/asm/elf.h | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/uapi/asm/elf.h
b/arch/powerpc/include/uapi/asm/elf.h
index 89fa042..7e39c91
Our ppc64 spinlocks and rwlocks use a trick where a lock token and
the paca index are placed in the lock with a single store. Since we
are using two u16s they need adjusting for little endian.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/paca.h | 5 +
arch/powerpc/incl
Fix the permute loops for little endian.
Signed-off-by: Anton Blanchard
---
arch/powerpc/lib/copyuser_power7.S | 54 +
arch/powerpc/lib/memcpy_power7.S | 55 ++
2 files changed, 63 insertions(+), 46 deletions(-)
diff --gi
FPRs overlap the high 64bits of the first 32 VSX registers. The
ptrace FP read/write code assumes big endian ordering and grabs
the lowest 64 bits.
Fix this by using the TS_FPR macro which does the right thing.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/ptrace.c | 8
1 file
The FPRs overlap the high doublewords of the first 32 VSX registers.
Fix TS_FPROFFSET and TS_VSRLOWOFFSET so we access the correct fields
in little endian mode.
If VSX is disabled the FPRs are only one doubleword in length so
TS_FPROFFSET needs adjusting in little endian.
Signed-off-by: Anton Bla
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/mmu-hash64.h | 4 +--
arch/powerpc/mm/hash_native_64.c | 46 ---
arch/powerpc/mm/hash_utils_64.c | 38 ++---
3 files changed, 46 insertions(+), 42 deletions(-)
diff --g
The elements within VSX loads and stores are big endian ordered
regardless of endianness. Our VSX context save/restore code uses
lxvd2x and stxvd2x which is a 2x doubleword operation. This means
the two doublewords will be swapped and we have to perform another
swap to undo it.
We need to do this
From: Ian Munsie
This patch maps the MMIO functions for 32bit PowerPC to their
appropriate instructions depending on CPU endianness.
The macros used to create the corresponding inline functions are also
renamed by this patch. Previously they had BE or LE in their names which
was misleading - the
Add endian annotation to various hypervisor structures which
are defined as big endian.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/lppaca.h | 50 +++
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/include/asm/lppa
The powerpc word-at-a-time functions are big endian specific.
Bring in the x86 version in order to support little endian builds.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/word-at-a-time.h | 71 +++
1 file changed, 71 insertions(+)
diff --git a/arch/
We need to set MSR_LE in kernel and userspace for little endian builds
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/reg.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index a312e0c..4e5708
We always take signals in big endian which is wrong. Signals
should be taken in native endian.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/signal_32.c | 3 ++-
arch/powerpc/kernel/signal_64.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/s
From: Ian Munsie
This patch will have powerpc include the appropriate generic endianness
header depending on what the compiler reports.
Signed-off-by: Ian Munsie
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/uapi/asm/byteorder.h | 4
1 file changed, 4 insertions(+)
diff --git
From: Benjamin Herrenschmidt
Create a trampoline that works in either endian and flips to
the expected endian. Use it for primary and secondary thread
entry as well as RTAS and OF call return.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/pp
We might need to flip endian when starting secondary threads via
RTAS.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/head_64.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 065d10f..2ae41ab 100644
--- a/arch/power
On little endian builds call H_SET_MODE so exceptions have the
correct endianness. We need a better hook to handle flipping back
into big endian mode on a kexec, but insert it into the mmu
teardown callback for now.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/hvcall.h
Add support for the H_SET_MODE hcall so we can select the
endianness of our exceptions.
We create a guest MSR from scratch when delivering exceptions in
a few places and instead of extracting the LPCR[ILE] and inserting
it into MSR_LE each time simply create a new variable intr_msr which
contains
Use swab64/32/16 instead of open coding it.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/align.c | 36
1 file changed, 12 insertions(+), 24 deletions(-)
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 52e5758..573728b 1
The alignment handler assumes big endian ordering when selecting
the low word of a 64bit floating point value. Use the existing
union which works in both little and big endian.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/align.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-
The TS_FPR macro selects the FPR component of a VSX register (the
high doubleword). emulate_vsx is using this macro to get the
address of the associated VSX register. This happens to work on big
endian, but fails on little endian.
Replace it with an explicit array access.
Signed-off-by: Anton Bla
Handle most unaligned load and store faults in little
endian mode. Strings, multiples and VSX are not supported.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/align.c | 93 ++---
1 file changed, 63 insertions(+), 30 deletions(-)
diff --git a/arch
Things are complicated by the fact that VSX elements are big
endian ordered even in little endian mode. 8 byte loads and
stores also write to the top 8 bytes of the register.
Signed-off-by: Anton Blanchard
---
arch/powerpc/kernel/align.c | 41 +
1 file cha
The hypervisor is big endian, so little endian kernel builds need
to byteswap.
Signed-off-by: Anton Blanchard
---
drivers/scsi/ibmvscsi/ibmvscsi.c | 153 ++-
drivers/scsi/ibmvscsi/viosrp.h | 46 ++--
2 files changed, 108 insertions(+), 91 deletions(
The hypervisor is big endian, so little endian kernel builds need
to byteswap.
Signed-off-by: Anton Blanchard
---
drivers/net/ethernet/ibm/ibmveth.c | 4 ++--
drivers/net/ethernet/ibm/ibmveth.h | 19 ---
2 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/net
We want ppc64 to be able to select between optimised assembly
checksum routines in big endian, and the generic lib/checksum.c
routines in little endian.
The lpfc driver is forcing CONFIG_GENERIC_CSUM on which means
we are unable to make the choice of when to enable and disable
it in the arch Kconf
We need to fix some endian issues in our checksum code. For now
just enable the generic checksum routines for little endian builds.
Signed-off-by: Anton Blanchard
---
arch/powerpc/Kconfig| 3 +++
arch/powerpc/include/asm/checksum.h | 5 +
arch/powerpc/kernel/ppc_ksyms.c |
We need to fix some endian issues in our memcpy code. For now
just enable the generic memcpy routine for little endian builds.
Signed-off-by: Anton Blanchard
---
arch/powerpc/include/asm/string.h | 4
arch/powerpc/kernel/ppc_ksyms.c | 2 ++
arch/powerpc/lib/Makefile | 9 ++---
We need to distinguish between big endian and little endian
environments, so fix uname to return the right thing.
Signed-off-by: Anton Blanchard
---
arch/powerpc/Makefile | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makef
From: Ian Munsie
This patch allows the kbuild system to successfully compile a kernel for
the little endian PowerPC64 architecture.
To build such a kernel a supported platform must be used and
CONFIG_CPU_LITTLE_ENDIAN must be set. If cross compiling, CROSS_COMPILE
must point to a suitable toolch
POWER7 takes alignment exceptions on some unaligned addresses, so
disable HAVE_EFFICIENT_UNALIGNED_ACCESS. This fixes an early boot
issue in the printk code.
Signed-off-by: Anton Blanchard
---
arch/powerpc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/K
Temporarily work around an ICE we are seeing while building
in little endian mode:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57134
Signed-off-by: Anton Blanchard
---
arch/powerpc/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/
This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
and CONFIG_VIRTUALIZATION disabled (required until we fix some
endian issues in KVM).
Signed-off-by: Anton Blanchard
---
arch/powerpc/configs/pseries_le_defconfig | 347 ++
1 file changed, 347 inserti
From: Mark Brown
This is another file we can generate so add it to the list.
Signed-off-by: Mark Brown
---
arch/powerpc/boot/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index c32ae5c..554734f 100644
--- a/arch/power
On Mon, 5 Aug 2013 16:14:29 -0700
Peter LaDow wrote:
...
> Perhaps it is a BIOS option ROM like you suggested earlier. The
> 3c90xC reference manual I found
> (http://people.freebsd.org/~wpaul/3Com/3c90xc.pdf) mentions an option
> ROM (and there is an Atmel part stuffed). I can't find any techni
this series
- fixes several drivers that are used in the MPC512x platform (UART,
SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
handle clocks (appropriately acquire and setup them, hold references
during use, release clocks after use)
- introduces support for the common
cleanup the MPC512x SoC's SPI master's use of the clock API
- get, prepare, and enable the MCLK during probe; disable, unprepare and
put the MCLK upon remove; hold a reference to the clock over the
period of use
- fetch MCLK rate (reference) once during probe and slightly reword BCLK
(bitrate
cleanup the clock API use of the UART driver which is shared among the
MPC512x and the MPC5200 platforms
- get, prepare, and enable the MCLK during port allocation; disable,
unprepare and put the MCLK upon port release; hold a reference to the
clock over the period of use; check for and propaga
use devm_clk_get() for automatic put after device close, check for and
propagate errors when enabling clocks, need to prepare clocks before
they can get enabled, adjust error code paths to correctly balance
get/put and prepare/unprepare and enable/disable calls
Signed-off-by: Gerhard Sittig
---
use devm_get_clk() for automatic put upon device close, check for and
propagate errors when enabling clocks, must prepare clocks before they
can get enabled, unprepare after disable
Signed-off-by: Gerhard Sittig
---
drivers/usb/host/fsl-mph-dr-of.c | 16 +---
1 file changed, 9 inse
use devm_clk_get() for automatic put after device close, check for and
propagate errors when enabling clocks, need to prepare clocks before
they can get enabled, adjust code paths to correctly balance get/put and
prepare/unprepare and enable/disable calls
Signed-off-by: Gerhard Sittig
---
driver
On 08/04/2013 10:13 PM, Michael Ellerman wrote:
> On Fri, Aug 02, 2013 at 02:13:06PM -0500, Nathan Fontenot wrote:
>> On 08/01/2013 09:32 PM, Michael Ellerman wrote:
>>> On Wed, Jul 24, 2013 at 01:37:47PM -0500, Nathan Fontenot wrote:
When doing memory hot add via the 'probe' interface in sysf
make the MPC I2C driver get, prepare and enable the peripheral clock
during probe ('per' for access to the peripheral's registers); disable
and unprepare the clock upon remove(), put is done by the devm approach;
hold a reference to the clock over the period of use
clock lookup is non-fatal in thi
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