On 07/22/2013 02:51 PM, Srivatsa S. Bhat wrote:
> On 07/22/2013 12:10 PM, Chen Gang wrote:
>> Since not need 'max_cpus' after the related commit, the related code
>> are useless too, need be removed.
>>
>> The related commit:
>>
>> c1aa687 powerpc: Clean up obsolete code relating to decrementer a
Hello Maintainers:
With allmodconfig and EXTRA_CFLAGS=-W", it reports warnings below:
arch/powerpc/xmon/xmon.c:3027:6: warning: variable ‘i’ might be clobbered by
‘longjmp’ or ‘vfork’ [-Wclobbered]
arch/powerpc/xmon/xmon.c:3068:6: warning: variable ‘i’ might be clobbered by
‘longjmp’ or ‘vfork’
Special voltages that can be support by eSDHC of T4 in esdhc node.
Signed-off-by: Haijun Zhang
Signed-off-by: Anton Vorontsov
---
Documentation/devicetree/bindings/mmc/fsl-esdhc.txt | 3 +++
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 1 +
2 files changed, 4 insertions(+)
diff --git
Add voltage-range support in esdhc of T4, So we can choose
to read voltages from dts file as one optional.
If we can get a valid voltage-range from device node, we use
this voltage as the final voltage support. Else we still read
from capacity or from other provider.
Signed-off-by: Haijun Zhang
S
> Subject: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
>
> Special voltages that can be support by eSDHC of T4 in esdhc node.
>
> Signed-off-by: Haijun Zhang
> Signed-off-by: Anton Vorontsov
> --- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
> +++ b/Documentation/devicetree
Fix a typo in pSeries_lpar_hpte_insert()
Signed-off-by: Denis Kirjanov
---
arch/powerpc/platforms/pseries/lpar.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/pseries/lpar.c
b/arch/powerpc/platforms/pseries/lpar.c
index 0da39fe..c4112ed 100644
--- a/
this series
- fixes several drivers that are used in the MPC512x platform (UART,
SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
handle clocks (appropriately acquire and setup them, hold references
during use, release clocks after use)
- introduces support for the common
cleanup the MPC512x SoC's SPI master's use of the clock API
- get, prepare, and enable the MCLK during probe; disable, unprepare and
put the MCLK upon remove; hold a reference to the clock over the
period of use
- fetch MCLK rate (reference) once during probe and slightly reword BCLK
(bitrate
prepare before enable isn't optional, do check for and propagate clock
setup errors, adjust error code paths to correctly balance get/put and
prepare/unprepare and enable/disable, use devm_{get,put}_clk()
Signed-off-by: Gerhard Sittig
---
drivers/mtd/nand/mpc5121_nfc.c | 20 +--
error check in the clock setup, must prepare clocks before they
can get enabled, unprepare after disable, use devm_{get,put}_clk()
Signed-off-by: Gerhard Sittig
---
drivers/usb/host/fsl-mph-dr-of.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/usb
cleanup the clock API use of the UART driver which is shared among the
MPC512x and the MPC5200 platforms
- get, prepare, and enable the MCLK during port allocation; disable,
unprepare and put the MCLK upon port release; hold a reference to the
clock over the period of use; check for and propaga
prepare clocks before enabling them, check for and propagate enable
errors, balance get/put and prepare/unprepare and enable/disable,
use devm_{get,put}_clk()
Signed-off-by: Gerhard Sittig
---
drivers/media/platform/fsl-viu.c | 26 --
1 file changed, 16 insertions(+), 1
make the MPC I2C driver get, prepare and enable the peripheral clock
('per' for access to the peripheral's registers) during probe;
disable, unprepare and put the clock upon remove(); hold a reference
to the clock over the period of use
clock lookup is non-fatal in this implementation as not all p
Signed-off-by: Gerhard Sittig
---
drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
index 8de53a1..c04eb3a 100644
--- a/drivers
make the Freescale ethernet driver get, prepare and enable the FEC clock
during probe(); disable, unprepare and put the clock upon remove(); hold
a reference to the clock over the period of use; use devm_{get,put}_clk()
clock lookup is non-fatal as not all platforms provide clock specs in
their de
make the Freescale PCI driver get, prepare and enable the PCI clock
during probe()
clock lookup is non-fatal as not all platforms may provide clock specs
in their device tree, but failure to enable specified clocks are fatal
the driver appears to not have a remove() routine, so no reference to
th
add a comment about the magic of deriving an MSCAN component index
from the peripheral's physical address / register offset
Signed-off-by: Gerhard Sittig
---
drivers/net/can/mscan/mpc5xxx_can.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/can/mscan/mpc5x
the .get_clock() callback is run from probe() and might allocate
resources, introduce a .put_clock() callback that is run from remove()
to undo any allocation activities
use devm_get_clk() upon lookup (for SYS and REF) to have the clocks put
upon driver unload
assume that resources get prepared b
reword the clock control module's registers declaration such that the
MCLK related registers form an array and get indexed by PSC number
this change is in preparation to COMMON_CLK support for the MPC512x
platform, the changed declaration remains neutral to existing code since
the PSC and MSCAN CC
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig
---
drivers/clk
prepare C preprocessor support when processing MPC512x DTS files
- switch from DTS syntax to CPP syntax for include specs
- create a symlink such that DTS processing can reference includes
Signed-off-by: Gerhard Sittig
---
arch/powerpc/boot/dts/ac14xx.dts |2 +-
arch/powerpc/boot/dt
introduce a dt-bindings/ header file for MPC512x clocks,
providing symbolic identifiers for those SoC clocks which
clients will reference from their device tree nodes
Signed-off-by: Gerhard Sittig
---
include/dt-bindings/clock/mpc512x-clock.h | 59 +
1 file changed,
this addresses the clock driver aka provider's side of clocks
- prepare for future '<&clks ID>' phandle references for device tree
based clock lookup in client drivers
- introduce a 'clocks' subtree with an 'osc' node for the crystal
or oscillator SoC input (fixed frequency)
- provide default v
this change implements a clock driver for the MPC512x PowerPC platform
which follows the COMMON_CLK approach and uses common clock drivers
shared with other platforms
this driver implements the publicly announced set of clocks (which can
get referenced by means of symbolic identifiers from the dt-
this addresses the client side of device tree based clock lookups
add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu, viu,
mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the shared
mpc5121.dtsi include
these specs map 'clock-names' encoded in drivers to their respective
'stru
after the device tree nodes provide clock specs for client side lookups,
peripheral drivers can attach to their clocks and the clock driver need
no longer pre-enable those clock items
Signed-off-by: Gerhard Sittig
---
arch/powerpc/platforms/512x/clock-commonclk.c |2 --
1 file changed, 2 del
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the "psc%d_mclk" template and unconditionally use "mclk"
Signed-off-by: Gerhard Sittig
---
drivers/spi/spi-mpc512x-psc.c |6 +-
1 file cha
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the "psc%d_mclk" template and unconditionally use "mclk"
Signed-off-by: Gerhard Sittig
---
drivers/tty/serial/mpc52xx_uart.c |8 +++-
1 fi
after the UART and SPI peripheral drivers have switched to device tree
based clock lookup and no longer construct clock names from their PSC
component index, the "psc%d_mclk" alias names have become obsolete --
remove the corresponding clk_register_clkdev() calls
Signed-off-by: Gerhard Sittig
---
prepare and enable the FIFO clock upon PSC FIFO initialization,
check for and propagage errors when enabling the PSC FIFO clock,
disable and unprepare the FIFO clock upon PSC FIFO uninitialization,
remove the pre-enable workaround from the platform's clock driver
devm_{get,put}_clk() doesn't apply
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the component
index -- remove the "usb%d_clk" template and unconditionally use "per",
remove the clock driver's clkdev registration
Signed-off-by: Gerhard Sittig
---
ar
after device tree based clock lookup became available, the VIU driver
need no longer use the previous "viu_clk" name but can switch to the
fixed "per" clock name -- adjust the peripheral driver and remove the
clock driver's clkdev registration
Signed-off-by: Gerhard Sittig
---
arch/powerpc/platf
implement a .get_clock() callback for the MPC512x platform which uses
the common clock infrastructure (eliminating direct access to the clock
control registers from within the CAN network driver), and provide the
corresponding .put_clock() callback to release resources after use
keep the previous
adapt the DIU clock initialization to the COMMON_CLK approach: device
tree based clock lookup, prepare and unprepare for clocks, work with
frequencies not dividers, call the appropriate clk_*() routines and
don't access CCM registers, remove the pre-enable workaround in the
platform's clock driver
completely switch to, i.e. unconditionally use COMMON_CLK for the
MPC512x platform, and retire the PPC_CLOCK implementation for that
platform after the transition has completed
Signed-off-by: Gerhard Sittig
---
arch/powerpc/platforms/512x/Kconfig | 14 +-
arch/powerpc/platforms/512x/Makefile
after device tree based clock lookup became available, the NAND flash
driver need no longer use the previous "nfc_clk" name but can switch to
the fixed "per" clock name -- adjust the peripheral driver and remove
the clock driver's clkdev registration
Signed-off-by: Gerhard Sittig
---
arch/powerp
transition to the common clock framework has completed and the PPC_CLOCK
is no longer available for the MPC512x platform, remove the now obsolete
code path of the mpc5xxx mscan driver which accessed clock control
module registers directly
Signed-off-by: Gerhard Sittig
---
drivers/net/can/mscan/m
remove the last clkdev registration call ("sys_clk" and "ref_clk"
for mscan), as well as the clkdev header inclusion and the "compat
registration" comment
all client lookups for clock items are device tree based now, no
compatibility alias names need to get provided any longer
Signed-off-by: Gerh
On 07/22/2013 02:14 PM, Gerhard Sittig wrote:
> make the Freescale ethernet driver get, prepare and enable the FEC clock
> during probe(); disable, unprepare and put the clock upon remove(); hold
> a reference to the clock over the period of use; use devm_{get,put}_clk()
There's no need for devm_c
[ manually added devicetree at vger now ]
On Mon, Jul 22, 2013 at 14:14 +0200, Gerhard Sittig wrote:
>
> this series
> - fixes several drivers that are used in the MPC512x platform (UART,
> SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
> handle clocks (appropriately acq
On 07/22/2013 02:14 PM, Gerhard Sittig wrote:
> the .get_clock() callback is run from probe() and might allocate
> resources, introduce a .put_clock() callback that is run from remove()
> to undo any allocation activities
looks good
> use devm_get_clk() upon lookup (for SYS and REF) to have the c
On 07/22/2013 02:14 PM, Gerhard Sittig wrote:
> implement a .get_clock() callback for the MPC512x platform which uses
> the common clock infrastructure (eliminating direct access to the clock
> control registers from within the CAN network driver), and provide the
> corresponding .put_clock() callb
On Mon, Jul 22, 2013 at 02:14:28PM +0200, Gerhard Sittig wrote:
> + ret = clk_prepare_enable(clk);
> + if (ret) {
> + devm_clk_put(dev, clk);
> + goto free_irq;
The main point of the devm_ APIs is to avoid the need for explicit
freeing so you should just remove the
On Saturday 20 July 2013 01:39 AM, Grant Likely wrote:
> On Mon, 01 Jul 2013 16:34:26 -0500, Rob Herring wrote:
>> On 07/01/2013 01:20 PM, Santosh Shilimkar wrote:
>>> On some PAE architectures, the entire range of physical memory could reside
>>> outside the 32-bit limit. These systems need the
On Jul 17, 2013, at 5:11 AM, Haijun Zhang wrote:
> Vender version and sdhc spec version of T4240-R1.0 is incorrect.
> The right value should be VVN=0x13, SVN = 0x1. The wrong version
> number will break down the ADMA data transfer.
> This defect only exist in T4240-R1.0. Will be fixed in T4240-R2
On Jul 16, 2013, at 6:57 AM, Kevin Hao wrote:
> For some SoC (such as the FSL BookE) even though there does have
> a hardware FPU, but not all floating point instructions are
> implemented. Unfortunately some versions of gcc do use these
> unimplemented instructions. Then we have to enable the ma
Denis Kirjanov writes:
> Fix a typo in pSeries_lpar_hpte_insert()
>
> Signed-off-by: Denis Kirjanov
looks good
Reviewed-by: Aneesh Kumar K.V
We may want to add the commit that introduced the change ?
801eb73f45371accc78ca9d6d22d647eeb722c11
> ---
> arch/powerpc/platforms/pseries/lpar.c |
On Jul 22, 2013, at 4:47 AM, Wrobel Heinz-R39252 wrote:
>> Subject: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
>>
>> Special voltages that can be support by eSDHC of T4 in esdhc node.
>>
>> Signed-off-by: Haijun Zhang
>> Signed-off-by: Anton Vorontsov
>
>> --- a/Documentation/dev
On 07/21/2013 09:00:51 PM, Jia Hongtao-B38951 wrote:
Hi Scott,
The fsl_msi.c build error on MPC83xx platform is fixed by this patch.
Could you please have a review?
Thanks.
-Hongtao
I will apply it when I apply the patch that depends on it. I hope to
resume applying patches soon.
-Scott
On 07/22/2013 09:36:05 AM, Kumar Gala wrote:
On Jul 16, 2013, at 6:57 AM, Kevin Hao wrote:
> For some SoC (such as the FSL BookE) even though there does have
> a hardware FPU, but not all floating point instructions are
> implemented. Unfortunately some versions of gcc do use these
> unimplemen
On 14:20 Mon 01 Jul , Santosh Shilimkar wrote:
> On some PAE architectures, the entire range of physical memory could reside
> outside the 32-bit limit. These systems need the ability to specify the
> initrd location using 64-bit numbers.
>
> This patch globally modifies the early_init_dt_set
On 07/22/2013 02:53:56 AM, Haijun Zhang wrote:
Add voltage-range support in esdhc of T4, So we can choose
to read voltages from dts file as one optional.
If we can get a valid voltage-range from device node, we use
this voltage as the final voltage support. Else we still read
from capacity or fro
On 07/22/2013 12:55:38 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This updates the discription of each type of DMA controller and its
channels,
it is preparation for adding another new DMA controller binding, also
fixes
some defects of indent for text alignment at the same ti
On Thu, Apr 11, 2013 at 09:56:30PM +0800, Zhenhua Luo wrote:
> When using recent udev, the /dev node mount requires CONFIG_DEVTMPFS_MOUNT
> is enabled in Kernel. The patch enables the option in defconfig of Freescale
> QorIQ targets.
>
> Changed defconfig list:
>arch/powerpc/configs/85xx/p1023
On Fri, Mar 02, 2012 at 03:12:33PM +0100, Alexander Graf wrote:
> When running inside a virtual machine, we can not modify timebase, so
> let's just not call the functions for it then.
>
> This resolves hangs when booting e500 SMP guests on overcommitted hosts.
>
> Reported-by: Stuart Yoder
> Si
On Thu, Apr 25, 2013 at 09:54:14AM +0800, Po Liu wrote:
> From: Mingkai Hu
>
> Add device tree for SEC 6.0 used on C29x silicon.
>
> Signed-off-by: Mingkai Hu
> Singed-off-by: Po Liu
I've heard of patches being flamed, but here we want signing, not
singeing. :-)
Don't forget that you can use
On Thu, Apr 25, 2013 at 09:54:16AM +0800, Po Liu wrote:
> From: Mingkai Hu
>
> C293PCIE board is a series of Freescale PCIe add-in cards to perform
> as public key crypto accelerator or secure key management module.
>
> - 512KB platform SRAM in addition to 512K L2 Cache/SRAM
> - 512MB soldered
On Thu, Apr 25, 2013 at 09:54:17AM +0800, Po Liu wrote:
> From: Mingkai Hu
>
> Signed-off-by: Mingkai Hu
>
> ---
> Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
> arch/powerpc/configs/mpc85xx_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/powerpc/c
On Thu, Apr 25, 2013 at 09:54:17AM +0800, Po Liu wrote:
> From: Mingkai Hu
>
> Signed-off-by: Mingkai Hu
>
> ---
> Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
> arch/powerpc/configs/mpc85xx_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/powerpc/c
On Thu, Apr 25, 2013 at 03:13:48PM +0800, Xie Xiaobo wrote:
> + partition@40 {
> + /* 58.75MB for JFFS2 based Root file System */
> + reg = <0x0040 0x03ac>;
> + label = "NOR JFFS2 Root File System";
> +
On Mon, Jul 22, 2013 at 12:52 AM, Chen Gang wrote:
> pnv_pci_init_ioda2_phb() is only used during boot up, so need add
> '__init' to save the related memory, and avoid related warning:
>
> The function .pnv_pci_init_ioda2_phb() references
> the function __init .pnv_pci_init_ioda_phb().
> Thi
On Mon, May 13, 2013 at 02:27:08PM -0700, York Sun wrote:
> Erratum A-006037 indicates I2C controller executes the write to I2CCR only
> after it sees SCL idle for 64K cycle of internal I2C controller clocks. If
> during this waiting period, I2C controller is disabled (I2CCR[MEN] set to
> 0), then
On 07/23/2013 08:28 AM, Bjorn Helgaas wrote:
> On Mon, Jul 22, 2013 at 12:52 AM, Chen Gang wrote:
>> pnv_pci_init_ioda2_phb() is only used during boot up, so need add
>> '__init' to save the related memory, and avoid related warning:
>>
>> The function .pnv_pci_init_ioda2_phb() references
>> t
"Aneesh Kumar K.V" writes:
> From: "Aneesh Kumar K.V"
>
> The sllp value is stored in mmu_psize_defs in such a way that we can easily OR
> the value to get the operand for slbmte instruction. ie, the L and LP bits are
> not contiguous. Decode the bits and use them correctly in tlbie.
> regressio
"Aneesh Kumar K.V" writes:
> From: "Aneesh Kumar K.V"
>
> We should not fallthrough different case statements in hpte_decode. Add
> break statement to break out of the switch. The regression is introduced by
> dcda287a9b26309ae43a091d0ecde16f8f61b4c0 "powerpc/mm: Simplify hpte_decode"
>
> Report
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 23, 2013 1:19 AM
> To: Jia Hongtao-B38951
> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org;
> ga...@kernel.crashing.org; Li Yang-R58472; Jia Hongtao-B38951
> Subject: Re: [PATCH] powerpc/msi: Fix compile error on mpc
Thanks.
Regards
Haijun.
> -Original Message-
> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
> Sent: Monday, July 22, 2013 10:30 PM
> To: Zhang Haijun-B42677
> Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood Scott-
> B07421; c...@laptop.org; Fleming Andy-AFLEMI
Thanks.
Regards
Haijun.
> -Original Message-
> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
> Sent: Monday, July 22, 2013 10:40 PM
> To: Wrobel Heinz-R39252
> Cc: Zhang Haijun-B42677; linux-...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; Wood Scott-B07421; c...@laptop.or
Ping, anyone, please?
Ben needs ack from any of MM people before proceeding with this patch. Thanks!
On 07/16/2013 10:53 AM, Alexey Kardashevskiy wrote:
> The current VFIO-on-POWER implementation supports only user mode
> driven mapping, i.e. QEMU is sending requests to map/unmap pages.
> Howeve
On Tue, 2013-07-16 at 10:53 +1000, Alexey Kardashevskiy wrote:
> VFIO is designed to be used via ioctls on file descriptors
> returned by VFIO.
>
> However in some situations support for an external user is required.
> The first user is KVM on PPC64 (SPAPR TCE protocol) which is going to
> use the
Anyone, ping. Is it good, bad, ugly (ack/nack)? Thanks!
Is there any "trivial patches" list? Could not find it on vger.
On 07/15/2013 08:04 PM, Alexey Kardashevskiy wrote:
> Anyone, ping?
>
> On 07/06/2013 02:16 PM, Alexey Kardashevskiy wrote:
>> This adds hash_for_each_possible_rcu_notrace() w
Thanks.
Regards
Haijun.
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 23, 2013 1:41 AM
> To: Zhang Haijun-B42677
> Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> cbouatmai...@gmail.com; c...@laptop.org; Fleming Andy-AFLEMING; Zhang
> Haijun-B4267
On Tue, 2013-07-23 at 12:28 +1000, Alexey Kardashevskiy wrote:
> Anyone, ping. Is it good, bad, ugly (ack/nack)? Thanks!
>
> Is there any "trivial patches" list? Could not find it on vger.
Jiri Kosina has triv...@kernel.org
Also, there's kernel-janitors
http://vger.kernel.org/vger-lists.html#ke
On 07/22/2013 09:38:33 PM, Zhang Haijun-B42677 wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 23, 2013 1:41 AM
> To: Zhang Haijun-B42677
> Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> cbouatmai...@gmail.com; c...@laptop.org; Fleming Andy-AFL
On 07/23/2013 12:41 PM, Joe Perches wrote:
> On Tue, 2013-07-23 at 12:28 +1000, Alexey Kardashevskiy wrote:
>> Anyone, ping. Is it good, bad, ugly (ack/nack)? Thanks!
>>
>> Is there any "trivial patches" list? Could not find it on vger.
>
> Jiri Kosina has triv...@kernel.org
>
> Also, there's ker
On Tue, 2013-07-23 at 12:43 +1000, Alexey Kardashevskiy wrote:
> On 07/23/2013 12:41 PM, Joe Perches wrote:
> > On Tue, 2013-07-23 at 12:28 +1000, Alexey Kardashevskiy wrote:
> >> Anyone, ping. Is it good, bad, ugly (ack/nack)? Thanks!
> >> Is there any "trivial patches" list? Could not find it on
Thanks.
Regards
Haijun.
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 23, 2013 10:42 AM
> To: Zhang Haijun-B42677
> Cc: Wood Scott-B07421; linux-...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; cbouatmai...@gmail.com; c...@laptop.org; Fleming
> Andy-AFLEMI
eSDHC of T4240 had 1.8v voltage support. Add this node to specify
eSDHC voltage capacity. If this node not specified eSDHC driver
still can read from eSDHC host capacity register.
Signed-off-by: Haijun Zhang
Signed-off-by: Anton Vorontsov
---
changes for this patch set:
- split from patc
Freescale T4240QDS reference board has extra voltage shifters added
to allow 3.3V operation, so add 3.3v voltage support for T4240QDS.
Signed-off-by: Haijun Zhang
Signed-off-by: Anton Vorontsov
---
changes for this patch set:
- split from patch [PATCH 1/2] Powerpc: Add
- voltage
smt-snooze-delay is a tun-able provided currently on powerpc to delay the
entry of an idle cpu to NAP state. By default, the value is 100us,
which is entry criteria for NAP state i.e only if the idle period is
above 100us it would enter NAP. Value of -1 disables entry into NAP.
This value can be se
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