On Wed, Dec 21, 2011 at 11:55:02AM +1100, David Gibson wrote:
> On Thu, Dec 08, 2011 at 04:53:30PM +0530, K.Prasad wrote:
> > While PPC_PTRACE_SETHWDEBUG ptrace flag in PowerPC accepts
> > PPC_BREAKPOINT_MODE_EXACT mode of breakpoint, the same is not intimated to
> > the
> > user-space debuggers (
On Tue, 2011-12-20 at 06:40 +, Liu Shengzhou-B36685 wrote:
> > -Original Message-
> > From: Artem Bityutskiy [mailto:dedeki...@gmail.com]
> > Sent: Saturday, December 17, 2011 10:45 PM
> > To: Liu Shengzhou-B36685
> > Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421;
> > dw...@infra
From: Li Yang
Add support to disable and re-enable individual cores at runtime
on MPC85xx/QorIQ SMP machines. Currently support e500v1/e500v2 core.
MPC85xx machines use ePAPR spin-table in boot page for CPU kick-off.
This patch uses the boot page from bootloader to boot core at runtime.
It suppo
Add APIs for setting wakeup source and lossless Ethernet in low power modes.
These APIs can be used by wake-on-packet feature.
Signed-off-by: Dave Liu
Signed-off-by: Li Yang
Signed-off-by: Jin Qing
Signed-off-by: Zhao Chenhui
---
arch/powerpc/sysdev/fsl_pmc.c | 70 ++
From: Li Yang
In sleep PM mode, the clocks of e500 core and unused IP blocks is
turned off. IP blocks which are allowed to wake up the processor
are still running.
Some Freescale chips like MPC8536 and P1022 has deep sleep PM mode
in addtion to the sleep PM mode.
While in deep sleep PM mode, ad
From: Li Yang
Signed-off-by: Li Yang
---
.../devicetree/bindings/powerpc/fsl/pmc.txt| 63 +++
1 files changed, 36 insertions(+), 27 deletions(-)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
ssed
>
> from the u64 *next_tb = &__get_cpu_var(decrementers_next_tb)
> in decrementer_check_overflow(): I've no idea whether it's safe
> just to use get_cpu_var then put_cpu_var there instead,
> but no hurry, I can surv
I am out of the office until 04/01/2012.
Note: This is an automated response to your message "Linuxppc-dev Digest,
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This file, like many others, needs to include .
Signed-off-by: Kyle Moffett
---
arch/powerpc/kvm/e500.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 26d2090..387c383 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arc
The 44x/currituck platform didn't get updated when the MPIC code
inverted the flag from MPIC_PRIMARY => !MPIC_SECONDARY. Fix it up.
Signed-off-by: Kyle Moffett
---
arch/powerpc/platforms/44x/currituck.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platf
The MPIC code checks for a "big-endian" property and sets the flag
MPIC_BIG_ENDIAN if one is present. Unfortunately, the PowerQUICC-III
compatible device-tree does not specify it, so all of the board ports
need to manually set that flag when calling mpic_alloc().
Document the flag and add it to t
On Thu, Dec 22, 2011 at 11:21 AM, Kyle Moffett
wrote:
> The 44x/currituck platform didn't get updated when the MPIC code
> inverted the flag from MPIC_PRIMARY => !MPIC_SECONDARY. Fix it up.
>
> Signed-off-by: Kyle Moffett
I already included this fixup in my 4xx tree 'next' branch. A pull
reque
On 12/22/2011 05:43 AM, Zhao Chenhui wrote:
>Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these
> - bit assignments are indicated via the sleep specifier in each device's
> - sleep property.
> + bit assignments are indicated via the clock nodes. Device which has a
>
On 12/22/2011 05:43 AM, Zhao Chenhui wrote:
> From: Li Yang
>
> Signed-off-by: Li Yang
> ---
> .../devicetree/bindings/powerpc/fsl/pmc.txt| 63 +++
> 1 files changed, 36 insertions(+), 27 deletions(-)
Pleace CC devicetree-disc...@lists.ozlabs.org on all changes to dev
Hello all,
With the following series of patches, most new MPC85xx platforms should
be able to get away with just this code (assuming updated dtb):
struct mpic *mpic = mpic_alloc(NULL, 0, 0, 0, "OpenPIC");
mpic_init(mpic);
Several of the hard-coded flags can now be provided as properties in
t
The mpic_alloc() function takes a "flags" parameter and assigns it into
the mpic->flags variable fairly early on, but several later pieces of
code detect various device-tree properties and save them into the
"mpic->flags" variable (EG: "big-endian" => MPIC_BIG_ENDIAN).
Unfortunately, a number of c
The MPIC code checks for a "big-endian" property and sets the flag
MPIC_BIG_ENDIAN if one is present, although prior to the "mpic->flags"
fixup that would never have worked anways.
Unfortunately, even now that it works properly, the Freescale mpic
device-node (the "PowerQUICC-III"-compatible one)
The Freescale MPIC (and perhaps others in the future) is incapable of
routing non-IPI interrupts to more than once CPU at a time. Currently
all of the Freescale boards msut pass the MPIC_SINGLE_DEST_CPU flag to
mpic_alloc(), but that information should really be present in the
device-tree.
Older
The mpic->irq_count variable is only used as a software error-checking
limit to determine whether or not an IRQ number is valid. In board code
which does not manually specify an IRQ count to mpic_alloc(), i.e. 0, it
is automatically detected from the number of ISUs and the ISU size.
In practice,
The FreeScale PowerQUICC-III-compatible (mpc85xx/mpc86xx) MPICs do not
correctly report the number of hardware interrupt sources, so software
needs to override the detected value with "256".
To avoid needing to write custom board-specific code to detect that
scenario, allow it to be easily overrid
There are two separate flags controlling whether or not the MPIC is
reset during initialization, which is completely unnecessary, and only
one of them can be specified in the device tree.
Also, most platforms in-tree right now do actually want to reset the
MPIC during initialization anyways, which
ther it's safe
> > just to use get_cpu_var then put_cpu_var there instead,
> > but no hurry, I can survive with DEBUG_PREEMPT off.
>
> Still a problem in 3.2.0-rc6-next-20111222
Ah forgot about that, I'll have a look. Thanks for the reminder.
Cheers,
Ben.
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Greetings All
I am running dual linux on P1022RDK in AMP configuration. My memory
partitioning is as below
-
Core | Base Address |Size |
--|---|--
From: Jerry Huang
Accordint to latest kernel, the auto-cmd12 property should be
"sdhci,auto-cmd12", and according to the SDHC binding and the workaround for
the special chip, add the chip compatible for eSDHC: "fsl,p1022-esdhc",
"fsl,mpc8536-esdhc", "fsl,p2020-esdhc" and "fsl,p1010-esdhc".
Signe
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