On Sunday 07 December 2008 06:43:33 Stephen Rothwell wrote:
> Hi Paul,
>
> On Sun, 7 Dec 2008 13:31:00 +1100 Paul Mackerras <[EMAIL PROTECTED]> wrote:
> >
> > I'm really in two minds about applying any of the of_node_put patches
> > that only affect powermacs. The reference counts only matter on
My old iMac (1998) G3 seems to have the limit of the first 8 GB for installing
any operativesystem if we want it to be bootable.With Mac OS X it seems to be
true,we run intoproblems if the installation gets out of this limit.I have a
LinuxPPC distribution installed on one partition within my 4GB
On Thu, 2008-12-04 at 18:12 -0600, Flores, Raul wrote:
> A bit off topic, but since the subject is pci resource allocation:
>
> As entered here:
> http://bugs.gentoo.org/show_bug.cgi?id=249832
>
> the 2.6.24-gentoo-r3 kernel; iomem tree for my video display works, but
> has not worked in the foll
On Sun, 2008-12-07 at 16:43 +1100, Stephen Rothwell wrote:
> Hi Paul,
>
> On Sun, 7 Dec 2008 13:31:00 +1100 Paul Mackerras <[EMAIL PROTECTED]> wrote:
> >
> > I'm really in two minds about applying any of the of_node_put patches
> > that only affect powermacs. The reference counts only matter on
>
The MTD system supports operation where a direct mapped flash chip is
mapped twice. The normal mapping is a standard ioremap(), which is
non-cached and guarded on powerpc. The second mapping is used only for
reads and can be cached and non-guarded. Currently, only the pxa2xx
mapping driver makes
The ECCM maybe set in bootloader, Get ECCM settings from the bootloader,
can avoid the image written by bootloader cannot read out by kernel.
But the limitation of doing it this way is that, it could break large page
NAND if it is written with NAND disabled in u-boot and read with NAND
enabled, or
The Makefile missed the necessary bit for treeboot-iss4xx.o to be built
thus breaking builds of this platform
Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
---
arch/powerpc/boot/Makefile |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- linux-work.orig/arch/powerpc/boot/M
On Mon, 2008-12-08 at 15:32 +1100, Benjamin Herrenschmidt wrote:
> The Makefile missed the necessary bit for treeboot-iss4xx.o to be built
> thus breaking builds of this platform
>
> Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
> ---
Ignore patch, my mistake :-)
Cheers,
Ben.
> arc
The global ppc_pci_flags is not defined when CONFIG_PCI is not
set, causing a link error
Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/40x/ppc40x_simple.c |2 ++
arch/powerpc/platforms/44x/ppc44x_simple.c |2 ++
2 files changed, 4 insertions(+)
---
On Mon, 2008-12-08 at 15:53 +1100, Benjamin Herrenschmidt wrote:
> The global ppc_pci_flags is not defined when CONFIG_PCI is not
> set, causing a link error
>
> Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
> ---
>
> arch/powerpc/platforms/40x/ppc40x_simple.c |2 ++
> arch/power
> > --- linux-work.orig/arch/powerpc/platforms/40x/ppc40x_simple.c
> > 2008-12-08 15:51:49.0 +1100
> > +++ linux-work/arch/powerpc/platforms/40x/ppc40x_simple.c 2008-12-08
> > 15:51:52.0 +1100
> > @@ -61,7 +61,9 @@ static int __init ppc40x_probe(void)
> >
> > for (i
This series of patches is aimed at supporting SMP on non-hash
based processors. It consists of a rework of the MMU context
management and TLB management, clearly splitting hash32, hash64
and nohash in both cases, adding SMP safe context handling and
some basic SMP TLB management.
There is room for
We were missing the CPU_FTR_NOEXECUTE bit in our cputable for all
these processors. The result is that update_mmu_cache() would flush
the cache for all pages mapped to userspace which is totally
unnecessary on those processors since we already handle flushing
on execute in the page fault path.
Thi
Instead of not defining it at all, this defines the macro as
being empty, thus avoiding ifdef's in call sites when CONFIG_BUG
is not set.
Also removes an extra whitespace in the existing definition
Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
---
arch/powerpc/include/asm/bug.h |
This adds supports to the "extended" DCR addressing via
the indirect mfdcrx/mtdcrx instructions supported by some
4xx cores (440H6 and later)
I enabled the feature for now only on AMCC 460 chips
Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
---
arch/powerpc/include/asm/cputable.h
This adds a local_flush_tlb_mm() call as a pre-requisite for some
SMP work for BookE processors
Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
---
arch/powerpc/include/asm/tlbflush.h |5 +
1 file changed, 5 insertions(+)
--- linux-work.orig/arch/powerpc/include/asm/tlbflush.h
This splits the mmu_context handling between 32-bit hash based processors,
64-bit hash based processors and everybody else. This is preliminary work
for adding SMP support for BookE processors.
Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
---
arch/powerpc/include/asm/mmu_context.h
This reworks the context management code used by 4xx,8xx and
freescale BookE. It adds support for SMP by implementing a
concept of stale context map to lazily flush the TLB on
processors where a context may have been invalidated. This
also contains the ground work for generalizing such lazy TLB
flu
This renames the files to clarify the fact that they are used by
the hash based family of CPUs (the 603 being an exception in that
family but is still handled by that code).
This paves the way for the new tlb_nohash.c coming via a subsequent
patch.
Signed-off-by: Benjamin Herrenschmidt <[EMAIL PR
This patch moves the whole no-hash TLB handling out of line into a
new tlb_nohash.c file, and implements some basic SMP support using
IPIs and/or broadcast tlbivax instructions.
Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
---
arch/powerpc/include/asm/mmu.h |3
arch/powerp
On Sun, 2008-12-07 at 12:18 -0800, Anthony Renaud wrote:
> The problem is : Can Linux surpass this 8GB limit and be installed on
> partitions out of this
>
> 8GB limit,and be bootable and run without problems? It seems a hardisk
> controller limitation
>
> of these first iMac models.
>
As long a
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