On Tue, 2017-03-07 at 00:39:31 UTC, Cyril Bur wrote:
> On POWER8 (ISA 2.07) lxvx and stxvx are defined to be extended mnemonics
> of lxvd2x and stxvd2x. For POWER9 (ISA 3.0) the HW architects in their
> infinite wisdom made lxvx and stxvx instructions in their own right.
>
> POWER9 aware GCC will
On POWER8 (ISA 2.07) lxvx and stxvx are defined to be extended mnemonics
of lxvd2x and stxvd2x. For POWER9 (ISA 3.0) the HW architects in their
infinite wisdom made lxvx and stxvx instructions in their own right.
POWER9 aware GCC will use the POWER9 instruction for lxvx and stxvx
causing these sel
On 07-Mar-2017 11:43 AM, "Cyril Bur" wrote:
On POWER8 (ISA 2.07) lxvx and stxvx are defined to be extended mnemonics
of lxvd2x and stxvd2x. For POWER9 (ISA 3.0) the HW architects in their
infinite wisdom made lxvx and stxvx instructions in their own right.
POWER9 aware GCC will use the POWER9 in
On POWER8 (ISA 2.07) lxvx and stxvx are defined to be extended mnemonics
of lxvd2x and stxvd2x. For POWER9 (ISA 3.0) the HW architects in their
infinite wisdom made lxvx and stxvx instructions in their own right.
POWER9 aware GCC will use the POWER9 instruction for lxvx and stxvx
causing these sel