Re: bpf jit PPC64 (BE) test_verifier PTR_TO_STACK store/load failure

2019-03-15 Thread Naveen N. Rao
Segher Boessenkool wrote: Hi! On Wed, Mar 13, 2019 at 12:54:16PM +0200, Yauheni Kaliuta wrote: This is because of the handling of the +2 offset. The low two bits of instructions with primary opcodes 58 and 62 are part of the opcode, not the offset. These instructions can not have offsets wit

Re: bpf jit PPC64 (BE) test_verifier PTR_TO_STACK store/load failure

2019-03-13 Thread Segher Boessenkool
Hi! On Wed, Mar 13, 2019 at 12:54:16PM +0200, Yauheni Kaliuta wrote: > This is because of the handling of the +2 offset. The low two bits of instructions with primary opcodes 58 and 62 are part of the opcode, not the offset. These instructions can not have offsets with the low two bits non-zero.

bpf jit PPC64 (BE) test_verifier PTR_TO_STACK store/load failure

2019-03-13 Thread Yauheni Kaliuta
Hi! I found a failure: ``` # ./test_verifier 722 #722/u PTR_TO_STACK store/load FAIL retval -1 != -87117812 0: (bf) r1 = r10 1: (07) r1 += -10 2: (7a) *(u64 *)(r1 +2) = -87117812 3: (79) r0 = *(u64 *)(r1 +2) 4: (95) exit processed 5 insns (limit 131072), stack depth 8 #722/p PTR_TO_STACK store/l

Re: bpf jit PPC64 (BE) test_verifier PTR_TO_STACK store/load failure

2019-03-13 Thread Naveen N. Rao
Hi, Yauheni Kaliuta wrote: Hi! I found a failure: ``` # ./test_verifier 722 #722/u PTR_TO_STACK store/load FAIL retval -1 != -87117812 0: (bf) r1 = r10 1: (07) r1 += -10 2: (7a) *(u64 *)(r1 +2) = -87117812 3: (79) r0 = *(u64 *)(r1 +2) 4: (95) exit processed 5 insns (limit 131072), stack dept