n Loeliger
> > > Cc: [EMAIL PROTECTED];
> > > linuxppc-dev@ozlabs.org; Michal Simek; git
> > > Subject: Re: Xilinx EDK BSP generation of device trees for
> > > microblaze and PowerPC
> > >
> > > On 11/24/07, Stephen Neuendorffer
> > >
t; > linuxppc-dev@ozlabs.org; Michal Simek; git
> > Subject: Re: Xilinx EDK BSP generation of device trees for
> > microblaze and PowerPC
> >
> > On 11/24/07, Stephen Neuendorffer
> > <[EMAIL PROTECTED]> wrote:
> > >
> >
> > Thanks for al
On Mon, Nov 26, 2007 at 01:44:02PM -0800, Stephen Neuendorffer wrote:
[snip]
> > > reg = < 81c0 40 >;
> >
> > If these registers are addressable, then the parent needs a
> > 'ranges' property.
>
> I thought ranges weren't necessary in a 1:1 mapping?
You were
On Sun, Nov 25, 2007 at 03:47:12PM -0700, Grant Likely wrote:
> On 11/24/07, Stephen Neuendorffer <[EMAIL PROTECTED]> wrote:
[snip]
> > So: the mpmc generates a 'memory' node, corresponding to it's memory
> > interface. It also gets a separate entry which contains the (optional, not
> > present i
Stephen Neuendorffer; Segher Boessenkool; David Gibson;
> Jon Loeliger
> Cc: [EMAIL PROTECTED];
> linuxppc-dev@ozlabs.org; Michal Simek; git
> Subject: Re: Xilinx EDK BSP generation of device trees for
> microblaze and PowerPC
>
> On 11/24/07, Stephen Neuendorffer
> <[E
to the xps-ll-temac node...
In fact, if the network nodes are children of the xps-ll-temac node,
then the xps-ll-temac node should itself be a child of the addressable
bus (be it PLB or OPB).
Cheers,
g.
>
> 3) All of this is very different in structure from the way that the
> xparamete
ply other parameters of the ll_temac driver. Although the
above structure better represents the actual system, there is another
organization for people to be confused about.
Steve
-Original Message-
From: [EMAIL PROTECTED] on behalf of Stephen Neuendorffer
Sent: Tue 11/20/2007 1
I've updated some code from Michel Simek to generate Flat Device Trees
from Xilinx EDK projects. This code is now hosted at:
git://git.xilinx.com/gen-mhs-devtree.git
This has one major advantage over the gen-mhs-devtree.py approach:
default IP core parameters that are not specified in th
