On Fri, Apr 17, 2009 at 08:17:18PM +0200, Bartlomiej Zolnierkiewicz wrote:
> On Friday 17 April 2009 18:49:44 Benjamin Herrenschmidt wrote:
> > > But they don't. On MPC8610HPCD we have IDE interrupt directly
> > > connected to the MPIC line (through PCI sideband interrupt), and
> > > i8259 is _comp
On Friday 17 April 2009 18:49:44 Benjamin Herrenschmidt wrote:
> > But they don't. On MPC8610HPCD we have IDE interrupt directly
> > connected to the MPIC line (through PCI sideband interrupt), and
> > i8259 is _completely_ disabled in the bridge.
>
> Hrm why did you do that ? :-)
>
> Just kiddin
> But they don't. On MPC8610HPCD we have IDE interrupt directly
> connected to the MPIC line (through PCI sideband interrupt), and
> i8259 is _completely_ disabled in the bridge.
Hrm why did you do that ? :-)
Just kidding... if what you want is the PCI interrupt, then it should
be in native mode,
On Fri, Apr 17, 2009 at 09:40:19AM +0200, Benjamin Herrenschmidt wrote:
> On Thu, 2009-04-16 at 21:30 +0200, Bartlomiej Zolnierkiewicz wrote:
> > Hi,
> >
> > On Wednesday 15 April 2009 16:34:22 Roderick Colenbrander wrote:
> > > Hi,
> > >
> > > I'm using a Xilinx ML510 it features a PowerPC 440 c
On Thu, 2009-04-16 at 21:30 +0200, Bartlomiej Zolnierkiewicz wrote:
> Hi,
>
> On Wednesday 15 April 2009 16:34:22 Roderick Colenbrander wrote:
> > Hi,
> >
> > I'm using a Xilinx ML510 it features a PowerPC 440 cpu inside a
> > Virtex-5 FPGA. The board also contains a ALI M1533 south bridge
> > fo
On Fri, Apr 17, 2009 at 12:04 AM, Anton Vorontsov
wrote:
> On Thu, Apr 16, 2009 at 11:27:34PM +0200, Roderick Colenbrander wrote:
>> On Thu, Apr 16, 2009 at 10:57 PM, Anton Vorontsov
>> wrote:
>> > On Thu, Apr 16, 2009 at 09:30:00PM +0200, Bartlomiej Zolnierkiewicz wrote:
>> >>
>> >> Hi,
>> >>
>>
On Thu, Apr 16, 2009 at 11:27:34PM +0200, Roderick Colenbrander wrote:
> On Thu, Apr 16, 2009 at 10:57 PM, Anton Vorontsov
> wrote:
> > On Thu, Apr 16, 2009 at 09:30:00PM +0200, Bartlomiej Zolnierkiewicz wrote:
> >>
> >> Hi,
> >>
> >> On Wednesday 15 April 2009 16:34:22 Roderick Colenbrander wrote
On Thu, Apr 16, 2009 at 10:57 PM, Anton Vorontsov
wrote:
> On Thu, Apr 16, 2009 at 09:30:00PM +0200, Bartlomiej Zolnierkiewicz wrote:
>>
>> Hi,
>>
>> On Wednesday 15 April 2009 16:34:22 Roderick Colenbrander wrote:
>> > Hi,
>> >
>> > I'm using a Xilinx ML510 it features a PowerPC 440 cpu inside a
On Thu, Apr 16, 2009 at 09:30:00PM +0200, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Wednesday 15 April 2009 16:34:22 Roderick Colenbrander wrote:
> > Hi,
> >
> > I'm using a Xilinx ML510 it features a PowerPC 440 cpu inside a
> > Virtex-5 FPGA. The board also contains a ALI M1533 south bri
Hi Roderick,
Since this patch is Xilinx virtex related, it is a good idea to cc:
both the linuxppc-dev mailing list and me when posting. That way I'd
have the opportunity to reply with an 'acked-by' or 'reviewed-by'
line.
g.
On Thu, Apr 16, 2009 at 1:30 PM, Bartlomiej Zolnierkiewicz
wrote:
>
>
Hi,
On Wednesday 15 April 2009 16:34:22 Roderick Colenbrander wrote:
> Hi,
>
> I'm using a Xilinx ML510 it features a PowerPC 440 cpu inside a
> Virtex-5 FPGA. The board also contains a ALI M1533 south bridge
> for IDE, USB and Audio. I did a lot of work to get the pci bus working
> on this boar
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