Original-Nachricht
> Datum: Mon, 16 Mar 2009 09:18:54 +0100
> Von: "Roderick Colenbrander"
> An: "Gerhard Pircher" , linuxppc-dev@ozlabs.org
> Betreff: Re: DTS file PCI / i8259 for Xilinx ML510
>
> Original-Nachricht ---
Original-Nachricht
> Datum: Sun, 15 Mar 2009 11:43:13 +0100
> Von: "Gerhard Pircher"
> An: "Roderick Colenbrander" , linuxppc-dev@ozlabs.org
> Betreff: Re: DTS file PCI / i8259 for Xilinx ML510
>
> Original-Nachricht ---
Original-Nachricht
> Datum: Sun, 15 Mar 2009 12:00:17 +0100
> Von: "Roderick Colenbrander"
> An: "Gerhard Pircher" , linuxppc-dev@ozlabs.org
> Betreff: Re: DTS file PCI / i8259 for Xilinx ML510
> > > I got the i8259 south bridge
> > I got the i8259 south bridge working now after adding an io_base_virt
> > offset to all inb/outb lines in sysdev/i8259.c. Would it be worth all
> > the troubles to add ppc32 support to isa-bridge.c? The whole point of
> > the code is basically to remap the io memory to low addresses for these
>
Original-Nachricht
> Datum: Sun, 15 Mar 2009 09:38:26 +0100
> Von: "Roderick Colenbrander"
> An: "Gerhard Pircher" , linuxppc-dev@ozlabs.org
> Betreff: Re: DTS file PCI / i8259 for Xilinx ML510
> > > At some point in the file
> > At some point in the file they create some (dummy?) pcie section in
> > which they define a uli1575, an isa bus and attached to that isa bus a
> > i8259. Is this the correct way of doing things? The i8259 driver seems
> > to use io ports 0x20-21/0xa0-0xa1/0x4d0-0x4d1 those are also defined
> >
Original-Nachricht
> Datum: Thu, 12 Mar 2009 11:32:19 +0100
> Von: "Roderick Colenbrander"
> An: linuxppc-dev@ozlabs.org
> Betreff: DTS file PCI / i8259 for Xilinx ML510
> ...
> The freescale boards define the pci bus like below and connect ULI M1575
> peripherals to the i8259
