> It should be fine on PowerMac as well -- all G5s use U3/U4,
> the workaround is for certain older Apple bridge chips.
Yeah, remove them. The workaround that is needed afaik is really only
the one that reads back the -address- before accessing the data register
(and I think it's sill needed on U
>>> Well, I had already checked with Ben, who wrote the code, and my
>>> understanding is that the reads are intended to work around some
>>> misbehaving Apple bridges,
>>
>> None of the PCI interfaces on the U3 or U4 bridges have that
>> problem as far as I know. I think the workaround was copied
Segher Boessenkool wrote:
> >>It might be worth checking that there isn't a particular reason for
> >>these. Just because posting writes are forbidden doesn't mean a
> >>particular bridge won't screw it up...
> >
> >Well, I had already checked with Ben, who wrote the code, and my
> >understanding
On Wed, Aug 08, 2007 at 08:04:32PM -0500, Nathan Lynch wrote:
> Benjamin Herrenschmidt wrote:
> > On Wed, 2007-08-08 at 19:50 -0500, Nathan Lynch wrote:
> > >
> > > Remove the gratuitous reads from u3_agp_write_config,
> > > u3_ht_write_config, and u4_pcie_write_config.
> > >
> > > Signed-off-by:
>> It might be worth checking that there isn't a particular reason for
>> these. Just because posting writes are forbidden doesn't mean a
>> particular bridge won't screw it up...
>
> Well, I had already checked with Ben, who wrote the code, and my
> understanding is that the reads are intended to
On Wed, Aug 08, 2007 at 11:16:32PM -0500, Nathan Lynch wrote:
> David Gibson wrote:
> > On Wed, Aug 08, 2007 at 07:50:44PM -0500, Nathan Lynch wrote:
> > > The maple pci configuration space write methods read the written
> > > location immediately after the write is performed, presumably in order
>
David Gibson wrote:
> On Wed, Aug 08, 2007 at 07:50:44PM -0500, Nathan Lynch wrote:
> > The maple pci configuration space write methods read the written
> > location immediately after the write is performed, presumably in order
> > to flush the write. However, configuration space writes are not
>
On Wed, Aug 08, 2007 at 07:50:44PM -0500, Nathan Lynch wrote:
> The maple pci configuration space write methods read the written
> location immediately after the write is performed, presumably in order
> to flush the write. However, configuration space writes are not
> allowed to be posted, making
On Wed, 2007-08-08 at 20:04 -0500, Nathan Lynch wrote:
> Benjamin Herrenschmidt wrote:
> > On Wed, 2007-08-08 at 19:50 -0500, Nathan Lynch wrote:
> > >
> > > Remove the gratuitous reads from u3_agp_write_config,
> > > u3_ht_write_config, and u4_pcie_write_config.
> > >
> > > Signed-off-by: Nathan
Benjamin Herrenschmidt wrote:
> On Wed, 2007-08-08 at 19:50 -0500, Nathan Lynch wrote:
> >
> > Remove the gratuitous reads from u3_agp_write_config,
> > u3_ht_write_config, and u4_pcie_write_config.
> >
> > Signed-off-by: Nathan Lynch <[EMAIL PROTECTED]>
>
> Acked-by: Benjamin Herrenschmidt <[EM
On Wed, 2007-08-08 at 19:50 -0500, Nathan Lynch wrote:
> The maple pci configuration space write methods read the written
> location immediately after the write is performed, presumably in order
> to flush the write. However, configuration space writes are not
> allowed to be posted, making these
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