On 24/05/24 12:55, Michael Ellerman wrote:
> Hi Anjali,
>
> Anjali K writes:
>> Currently in some cases, when the sampled instruction address register
>> latches to a specific address during sampling, there is an inconsistency
>> in the privilege bits captured in the sampled event register.
>
Hi Anjali,
Anjali K writes:
> Currently in some cases, when the sampled instruction address register
> latches to a specific address during sampling, there is an inconsistency
> in the privilege bits captured in the sampled event register.
I don't really like "inconsistency", it's vague.
The s