powerpc: Improve support for 4xx indirect DCRs
Accessing indirect DCRs is done via a pair of address/data DCRs.
Such accesses are thus inherently racy, vs. interrupts, preemption
and possibly SMP if 4xx SMP cores are ever used.
This updates the mfdcri/mtdcri macros in dcr-native.h (which were
so
On Thu, 06 Dec 2007 19:00:06 +1100
Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote:
> Accessing indirect DCRs is done via a pair of address/data DCRs.
>
> Such accesses are thus inherently racy, vs. interrupts, preemption
> and possibly SMP if 4xx SMP cores are ever used.
>
> This updates the m