On 02/10/2018 10:20 PM, Ram Pai wrote:
On Sat, Feb 10, 2018 at 03:17:02PM +0530, Aneesh Kumar K.V wrote:
Aneesh Kumar K.V writes:
"Aneesh Kumar K.V" writes:
To support memory keys, we moved the hash pte slot information to the second
half of the page table. This was ok with PTE entries a
On Sat, Feb 10, 2018 at 03:17:02PM +0530, Aneesh Kumar K.V wrote:
> Aneesh Kumar K.V writes:
>
> > "Aneesh Kumar K.V" writes:
> >
> >> To support memory keys, we moved the hash pte slot information to the
> >> second
> >> half of the page table. This was ok with PTE entries at level 4 and level
Aneesh Kumar K.V writes:
> "Aneesh Kumar K.V" writes:
>
>> To support memory keys, we moved the hash pte slot information to the second
>> half of the page table. This was ok with PTE entries at level 4 and level 3.
>> We already allocate larger page table pages at those level to accomodate
>>
On 02/09/2018 12:59 AM, Ram Pai wrote:
On Thu, Feb 08, 2018 at 08:46:27PM +0530, Aneesh Kumar K.V wrote:
"Aneesh Kumar K.V" writes:
To support memory keys, we moved the hash pte slot information to the second
half of the page table. This was ok with PTE entries at level 4 and level 3.
We al
On 02/09/2018 12:52 AM, Ram Pai wrote:
On Thu, Feb 08, 2018 at 04:04:41PM +0530, Aneesh Kumar K.V wrote:
To support memory keys, we moved the hash pte slot information to the second
half of the page table. This was ok with PTE entries at level 4 and level 3.
We already allocate larger page tab
On Thu, Feb 08, 2018 at 08:46:27PM +0530, Aneesh Kumar K.V wrote:
> "Aneesh Kumar K.V" writes:
>
> > To support memory keys, we moved the hash pte slot information to the second
> > half of the page table. This was ok with PTE entries at level 4 and level 3.
> > We already allocate larger page ta
On Thu, Feb 08, 2018 at 04:04:41PM +0530, Aneesh Kumar K.V wrote:
> To support memory keys, we moved the hash pte slot information to the second
> half of the page table. This was ok with PTE entries at level 4 and level 3.
> We already allocate larger page table pages at those level to accomodate
"Aneesh Kumar K.V" writes:
> To support memory keys, we moved the hash pte slot information to the second
> half of the page table. This was ok with PTE entries at level 4 and level 3.
> We already allocate larger page table pages at those level to accomodate extra
> details. For level 4 we alrea
