On Thu, Sep 09, 2010 at 03:28:34AM +0100, Chris Ball wrote:
[...]
> [7.372843] [] __might_sleep+0xd9/0xe0
> [7.387864] [] mutex_lock+0x1c/0x2a
> [7.402576] [] sdhci_led_control+0x1a/0x41
> [7.417727] [] led_trigger_event+0x42/0x5c
led_trigger_even grabs a readlock. :-(
> [
Hi,
On Wed, Sep 08, 2010 at 10:37:41PM +0100, Chris Ball wrote:
> Hi Andrew,
>
> On Tue, Sep 07, 2010 at 03:38:13PM -0700, Andrew Morton wrote:
> > > I noticed no throughput drop neither with PIO transfers nor
> > > with DMA (tested on MPC8569E CPU), while latencies should be
> > > greatly improv
Hi Anton,
On Thu, Sep 09, 2010 at 01:57:50AM +0400, Anton Vorontsov wrote:
> Thanks!
>
> Would be also great if you could point out which patch causes
> most of the performance drop (if any)?
>
> Albert, if you could find time, can you also "bisect" the
> patchset? I wouldn't want to buy Nintend
Hi Andrew,
On Tue, Sep 07, 2010 at 03:38:13PM -0700, Andrew Morton wrote:
> > I noticed no throughput drop neither with PIO transfers nor
> > with DMA (tested on MPC8569E CPU), while latencies should be
> > greatly improved.
>
> This patchset isn't causing any problems yet, but may do so in the
>
On Wed, Sep 08, 2010 at 11:05:48PM +0100, Chris Ball wrote:
> Hi Anton,
>
> On Thu, Sep 09, 2010 at 01:57:50AM +0400, Anton Vorontsov wrote:
> > Thanks!
> >
> > Would be also great if you could point out which patch causes
> > most of the performance drop (if any)?
> >
> > Albert, if you could f
On Wed, Sep 08, 2010 at 10:37:41PM +0100, Chris Ball wrote:
> Hi Andrew,
>
> On Tue, Sep 07, 2010 at 03:38:13PM -0700, Andrew Morton wrote:
> > > I noticed no throughput drop neither with PIO transfers nor
> > > with DMA (tested on MPC8569E CPU), while latencies should be
> > > greatly improved.
>
On Wed, 14 Jul 2010 17:07:28 +0400
Anton Vorontsov wrote:
> Hi all,
>
> Currently the sdhci driver does everything in the atomic context.
> And what is worse, PIO transfers are made from the IRQ handler.
>
> This causes huge latencies (up to 120 ms). On some P2020 SOCs,
> DMA and card detection
On Wed, 14 Jul 2010 17:07:28 +0400
Anton Vorontsov wrote:
> Hi all,
>
> Currently the sdhci driver does everything in the atomic context.
> And what is worse, PIO transfers are made from the IRQ handler.
>
> This causes huge latencies (up to 120 ms). On some P2020 SOCs,
> DMA and card detection
On Wed, 14 Jul 2010 17:07:28 +0400, Anton Vorontsov
wrote:
> Hi all,
>
> Currently the sdhci driver does everything in the atomic context.
> And what is worse, PIO transfers are made from the IRQ handler.
>
> This causes huge latencies (up to 120 ms). On some P2020 SOCs,
> DMA and card detectio
