On Jun 2, 2010, at 7:47 PM, Paul Mackerras wrote:
> On Wed, Jun 02, 2010 at 07:45:27AM -0500, Kumar Gala wrote:
>
>> Why do we need to have emu support for all of these instructions?
>
> Fair question. This arose in the context of the support for data
> breakpoint events in perf_events. Since
On Thu, 2010-06-03 at 11:10 +1000, Matt Evans wrote:
> Paul Mackerras wrote:
> > [snip]
> > The second alternative -- emulating the lwarx/stwcx and all the
> > instructions in between -- sounds complicated but turns out to be
> > pretty straightforward in fact, since the code for each instruction i
Paul Mackerras wrote:
> [snip]
> The second alternative -- emulating the lwarx/stwcx and all the
> instructions in between -- sounds complicated but turns out to be
> pretty straightforward in fact, since the code for each instruction is
> pretty small, easy to verify that it's correct, and has lit
On Wed, Jun 02, 2010 at 07:45:27AM -0500, Kumar Gala wrote:
> Why do we need to have emu support for all of these instructions?
Fair question. This arose in the context of the support for data
breakpoint events in perf_events. Since the data breakpoint facility
on our processors (DABR on server
On Jun 2, 2010, at 6:29 AM, Paul Mackerras wrote:
> This extends the emulate_step() function to handle a large proportion
> of the Book I instructions implemented on current 64-bit server
> processors. The aim is to handle all the load and store instructions
> used in the kernel, plus all of the
