Benjamin,
ioremap + readN / writeN will give you fully ordered behaviour. It's
only when you try to be sneaky or speedy and use the __raw variants
that you have to be more careful.
You've been most helpful, thanks.
--
Best Regards,
On Wed, 2009-09-16 at 15:11 -0700, Eddie Dawydiuk wrote:
> Benjamin,
>
> > Out of order execution != out of order storage. ioremap() will give you
> > guarded space which means it cannot be speculatively accessed for
> > example, and you do get -some- guarantees but not that your stores are
> > go
Benjamin,
Out of order execution != out of order storage. ioremap() will give you
guarded space which means it cannot be speculatively accessed for
example, and you do get -some- guarantees but not that your stores are
going to hit the device in order, nor that your loads are going to be
perform
On Wed, 2009-09-16 at 11:58 -0700, Eddie Dawydiuk wrote:
> I'm not sure I understand. To clarify I have an FPGA connected via the
> PCI bus
> which implements several peripherals, I've implemented device drivers
> for.
> Currently I am calling ioremap() to get a virtual address
> corresponding to
Benjamin,
Also, if you're going to access a PCI device directly, beware of other
issues such as ordering. PPC is an out of order architecture, you need
to ensure you add the appropriate memory barriers if you want to ensure
you accesses are done in the order you write them in your program.
For
On Wed, 2009-09-02 at 16:44 -0700, Eddie Dawydiuk wrote:
> Hello,
>
> I have a question regarding reading PCI bus registers from a user space
> application running on a PPC SBC. Seeing as though the PCI bus is little
> endian
> and PPC is big endian is it typical that one must perform a byte sw
On Wed, Sep 2, 2009 at 5:44 PM, Eddie Dawydiuk wrote:
> Hello,
>
> I have a question regarding reading PCI bus registers from a user space
> application running on a PPC SBC. Seeing as though the PCI bus is little
> endian and PPC is big endian is it typical that one must perform a byte swap
> on a
Hello,
I have a question regarding reading PCI bus registers from a user space
application running on a PPC SBC. Seeing as though the PCI bus is little endian
and PPC is big endian is it typical that one must perform a byte swap on all 16
and 32 bit register reads?
I've found this is true on
