On Thu, Jan 27, 2011 at 10:32:19AM +0200, Felix Radensky wrote:
> Hi Ira,
>
> On 01/25/2011 06:29 PM, Ira W. Snyder wrote:
> > On Tue, Jan 25, 2011 at 04:32:02PM +0200, Felix Radensky wrote:
> >> Hi Ira,
> >>
> >> On 01/25/2011 02:18 AM, Ira W. Snyder wrote:
> >>> On Tue, Jan 25, 2011 at 01:39:39A
Hi Ira,
On 01/25/2011 06:29 PM, Ira W. Snyder wrote:
On Tue, Jan 25, 2011 at 04:32:02PM +0200, Felix Radensky wrote:
Hi Ira,
On 01/25/2011 02:18 AM, Ira W. Snyder wrote:
On Tue, Jan 25, 2011 at 01:39:39AM +0200, Felix Radensky wrote:
Hi Ira, Scott
On 01/25/2011 12:26 AM, Ira W. Snyder wrote
On Wed, 26 Jan 2011 10:18:01 +
David Laight wrote:
>
> > What was the ppc you used?
>
> The 8315E PowerQUIICC II
Ah. The interconnect between the DMA engine and PCIe is different on
83xx.
> > The DMA engine and PCIe are both on OCeaN, so the traffic
> > does not need to pass through th
> What was the ppc you used?
The 8315E PowerQUIICC II
> On 85xx/QorIQ-family chips such as P2020, there is no DMA controller
> inside the PCIe controller itself (or are you talking about bus
> mastering by the PCIe device[1]? "interface" is a bit ambiguous),
> though it was considered part of
On Tue, 25 Jan 2011 16:34:49 +
David Laight wrote:
>
> > > custom board based on P2020 running linux-2.6.35. The PCI
> > > device is Altera FPGA, connected directly to SoC PCI-E
> controller.
>
>
> > This sounds like your FPGA doesn't handle burst mode accesses
> > correctly.
> > custom board based on P2020 running linux-2.6.35. The PCI
> > device is Altera FPGA, connected directly to SoC PCI-E
controller.
> This sounds like your FPGA doesn't handle burst mode accesses
> correctly.
> A logic analyzer will help you prove it.
He is doing PCIe, not PCI.
A
On Tue, Jan 25, 2011 at 04:32:02PM +0200, Felix Radensky wrote:
> Hi Ira,
>
> On 01/25/2011 02:18 AM, Ira W. Snyder wrote:
> > On Tue, Jan 25, 2011 at 01:39:39AM +0200, Felix Radensky wrote:
> >> Hi Ira, Scott
> >>
> >> On 01/25/2011 12:26 AM, Ira W. Snyder wrote:
> >>> On Mon, Jan 24, 2011 at 11:
> memcpy_toio() works fine, the data is written correctly. After
> DMA, the correct data appears at offsets 0xC, 0x1C, 0x2C, etc.
> of the destination buffer. I have 12 bytes of junk, 4 bytes of
> correct data, then again 12 bytes of junk and so on.
Does your Avalon MM slave decode the 4 byte enab
Hi Ira,
On 01/25/2011 02:18 AM, Ira W. Snyder wrote:
On Tue, Jan 25, 2011 at 01:39:39AM +0200, Felix Radensky wrote:
Hi Ira, Scott
On 01/25/2011 12:26 AM, Ira W. Snyder wrote:
On Mon, Jan 24, 2011 at 11:47:22PM +0200, Felix Radensky wrote:
Hi,
I'm trying to use FSL DMA engine to perform DMA
> I'm trying to use FSL DMA engine to perform DMA transfer from
> memory buffer obtained by kmalloc() to PCI memory. This is on
> custom board based on P2020 running linux-2.6.35. The PCI
> device is Altera FPGA, connected directly to SoC PCI-E controller.
You'll need to use the dma engine that
On Tue, Jan 25, 2011 at 01:39:39AM +0200, Felix Radensky wrote:
> Hi Ira, Scott
>
> On 01/25/2011 12:26 AM, Ira W. Snyder wrote:
> > On Mon, Jan 24, 2011 at 11:47:22PM +0200, Felix Radensky wrote:
> >> Hi,
> >>
> >> I'm trying to use FSL DMA engine to perform DMA transfer from
> >> memory buffer o
Hi Ira, Scott
On 01/25/2011 12:26 AM, Ira W. Snyder wrote:
On Mon, Jan 24, 2011 at 11:47:22PM +0200, Felix Radensky wrote:
Hi,
I'm trying to use FSL DMA engine to perform DMA transfer from
memory buffer obtained by kmalloc() to PCI memory. This is on
custom board based on P2020 running linux-2
On Mon, Jan 24, 2011 at 11:47:22PM +0200, Felix Radensky wrote:
> Hi,
>
> I'm trying to use FSL DMA engine to perform DMA transfer from
> memory buffer obtained by kmalloc() to PCI memory. This is on
> custom board based on P2020 running linux-2.6.35. The PCI
> device is Altera FPGA, connected dir
On Mon, 24 Jan 2011 23:47:22 +0200
Felix Radensky wrote:
> static int dma_transfer(struct dma_chan *chan, void *dst, void *src,
> size_t len)
> {
> int rc = 0;
> dma_addr_t dma_src;
> dma_addr_t dma_dst;
> dma_cookie_t cookie;
> struct completion cmp;
> enum dma_sta
Hi,
I'm trying to use FSL DMA engine to perform DMA transfer from
memory buffer obtained by kmalloc() to PCI memory. This is on
custom board based on P2020 running linux-2.6.35. The PCI
device is Altera FPGA, connected directly to SoC PCI-E controller.
01:00.0 Unassigned class [ff00]: Altera Cor
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