On Friday 23 May 2008, Grant Likely wrote:
> Very good point. Okay, so we cannot assume any correlation between
> the number of CS lines and the number of child nodes to the SPI bus.
That wasn't what I was implying ... all the devices hooked
up to a given chipselect should be viewed as a single (
On Thu, May 22, 2008 at 8:26 PM, David Brownell <[EMAIL PROTECTED]> wrote:
> On Wednesday 21 May 2008, Grant Likely wrote:
>> > spi-controller {
>> >#address-cells = 2;
>> >#size-cells = 0;
>> >[EMAIL PROTECTED],f000 { reg = < 0 f000 >; } // CS 0, SPI address
>> > f000
>> >
On Wednesday 21 May 2008, Grant Likely wrote:
> > spi-controller {
> > #address-cells = 2;
> > #size-cells = 0;
> > [EMAIL PROTECTED],f000 { reg = < 0 f000 >; } // CS 0, SPI address f000
> > [EMAIL PROTECTED],f000 { reg = < 1 f000 >; } // CS 1, SPI address f000
> > [