On Tue, 2021-08-31 at 13:39 -0700, David Christensen wrote:
> >
> > This series allow Indirect DMA using DDW when available, which
> > usually
> > means bigger pagesizes and more TCEs, and so more DMA space.
>
> How is the mapping method selected? LPAR creation via the HMC, Linux
> kernel load p
On 8/31/21 1:18 PM, Leonardo Brás wrote:
Hello David,
Sorry for the delay, I did not get your mail because I was not CC'd
in your reply (you sent the mail just to the mailing list).
Replies bellow:
On Mon, 2021-08-30 at 10:48 -0700, David Christensen wrote:
On 8/16/21 11:39 PM, Leonardo Br
Hello David,
Sorry for the delay, I did not get your mail because I was not CC'd
in your reply (you sent the mail just to the mailing list).
Replies bellow:
On Mon, 2021-08-30 at 10:48 -0700, David Christensen wrote:
> On 8/16/21 11:39 PM, Leonardo Bras wrote:
> > So far it's assumed possible to
On Tue, 17 Aug 2021 03:39:18 -0300, Leonardo Bras wrote:
> So far it's assumed possible to map the guest RAM 1:1 to the bus, which
> works with a small number of devices. SRIOV changes it as the user can
> configure hundreds VFs and since phyp preallocates TCEs and does not
> allow IOMMU pages bigg
On 8/16/21 11:39 PM, Leonardo Bras wrote:
So far it's assumed possible to map the guest RAM 1:1 to the bus, which
works with a small number of devices. SRIOV changes it as the user can
configure hundreds VFs and since phyp preallocates TCEs and does not
allow IOMMU pages bigger than 64K, it ha
So far it's assumed possible to map the guest RAM 1:1 to the bus, which
works with a small number of devices. SRIOV changes it as the user can
configure hundreds VFs and since phyp preallocates TCEs and does not
allow IOMMU pages bigger than 64K, it has to limit the number of TCEs
per a PE to limit
