Alexey, Fred:
On Fri, 2021-07-23 at 15:34 +1000, Alexey Kardashevskiy wrote:
>
>
> On 22/07/2021 01:04, Frederic Barrat wrote:
> >
> >
> > On 21/07/2021 05:32, Alexey Kardashevskiy wrote:
> > > > > + struct iommu_table *newtbl;
> > > > > + int i;
> > > > > +
> > > > > + fo
Hello Alexey, Fred. Thanks for reviewing!
On Wed, 2021-07-21 at 13:32 +1000, Alexey Kardashevskiy wrote:
> > > spin_lock(&direct_window_list_lock);
> >
> >
> >
> >
> > Somewhere around here, we have:
> >
> > out_remove_win:
> > remove_ddw(pdn, true, DIRECT64_PROPNAME);
> >
> > We s
On 22/07/2021 01:04, Frederic Barrat wrote:
On 21/07/2021 05:32, Alexey Kardashevskiy wrote:
+ struct iommu_table *newtbl;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(pci->phb->mem_resources); i++) {
+ const unsigned long mask = IORESOURCE_MEM_64 |
IORESOURCE_ME
On 21/07/2021 05:32, Alexey Kardashevskiy wrote:
+ struct iommu_table *newtbl;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(pci->phb->mem_resources); i++) {
+ const unsigned long mask = IORESOURCE_MEM_64 |
IORESOURCE_MEM;
+
+ /* Look for MMIO32 */
+
On 21/07/2021 04:12, Frederic Barrat wrote:
On 16/07/2021 10:27, Leonardo Bras wrote:
So far it's assumed possible to map the guest RAM 1:1 to the bus, which
works with a small number of devices. SRIOV changes it as the user can
configure hundreds VFs and since phyp preallocates TCEs and do
On 16/07/2021 10:27, Leonardo Bras wrote:
So far it's assumed possible to map the guest RAM 1:1 to the bus, which
works with a small number of devices. SRIOV changes it as the user can
configure hundreds VFs and since phyp preallocates TCEs and does not
allow IOMMU pages bigger than 64K, it ha
So far it's assumed possible to map the guest RAM 1:1 to the bus, which
works with a small number of devices. SRIOV changes it as the user can
configure hundreds VFs and since phyp preallocates TCEs and does not
allow IOMMU pages bigger than 64K, it has to limit the number of TCEs
per a PE to limit
