On 06/09/2016 10:12 AM, Sam Bobroff wrote:
> On Thu, Jun 02, 2016 at 07:38:58AM -0500, Shreyas B. Prabhu wrote:
>
> ...
>
>> +/* Power Management - PSSCR Fields */
>
> It might be nice to give the full name of the register, as below with the
> FPSCR.
>
I'll make the change while posting the
On Thu, Jun 02, 2016 at 07:38:58AM -0500, Shreyas B. Prabhu wrote:
...
> +/* Power Management - PSSCR Fields */
It might be nice to give the full name of the register, as below with the FPSCR.
> +#define PSSCR_RL_MASK0x000F
> +#define PSSCR_MTL_MASK 0x00F0
On Wed, 2016-06-08 at 22:31 +0530, Shreyas B Prabhu wrote:
> Hi Ben,
>
> Sorry for the delayed response.
>
> On 06/06/2016 03:58 AM, Benjamin Herrenschmidt wrote:
> >
> > On Thu, 2016-06-02 at 07:38 -0500, Shreyas B. Prabhu wrote:
> > >
> > > @@ -61,8 +72,13 @@ save_sprs_to_stack:
> > >
Hi Ben,
Sorry for the delayed response.
On 06/06/2016 03:58 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2016-06-02 at 07:38 -0500, Shreyas B. Prabhu wrote:
>> @@ -61,8 +72,13 @@ save_sprs_to_stack:
>> * Note all register i.e per-core, per-subcore or per-thread is saved
>> * here
On Thu, 2016-06-02 at 07:38 -0500, Shreyas B. Prabhu wrote:
> @@ -61,8 +72,13 @@ save_sprs_to_stack:
> * Note all register i.e per-core, per-subcore or per-thread is saved
> * here since any thread in the core might wake up first
> */
> +BEGIN_FTR_SECTION
> + mfspr
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added. This instruction replaces
instructions like nap, sleep, rvwinkle.
b) new per thread SPR named Processor Stop Status and Control Register
(PSSCR) is added which controls th
