Re: [PATCH v4 6/9] mm/mremap: Use range flush that does TLB and page walk cache flush

On 4/20/21 9:17 AM, Michael Ellerman wrote: "Aneesh Kumar K.V" writes: Some architectures do have the concept of page walk cache which need to be flush when updating higher levels of page tables. A fast mremap that involves moving page table pages instead of copying pte entries should flush pag

Re: [PATCH v4 6/9] mm/mremap: Use range flush that does TLB and page walk cache flush

"Aneesh Kumar K.V" writes: > Some architectures do have the concept of page walk cache which need > to be flush when updating higher levels of page tables. A fast mremap > that involves moving page table pages instead of copying pte entries > should flush page walk cache since the old translation

[PATCH v4 6/9] mm/mremap: Use range flush that does TLB and page walk cache flush

Some architectures do have the concept of page walk cache which need to be flush when updating higher levels of page tables. A fast mremap that involves moving page table pages instead of copying pte entries should flush page walk cache since the old translation cache is no more valid. Add new hel