> + [EMAIL PROTECTED] {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "soc";
> + ranges = < ffe0 0010>;
> + reg = ; // CCSRBAR & soc regs, remove
> once parse
> code for immrbase fixed
Hrm,
On Wed, Sep 12, 2007 at 12:04:20PM -0500, Kumar Gala wrote:
> I'm leaving them for now to match the others, we can clean them all
> up at the same time.
OK.
> Technically built-in is spec'd by the CHRP spec for ISA/PCI.
I looked in the CHRP I/O Device Reference and didn't see it, though I may
On Sep 12, 2007, at 11:36 AM, Scott Wood wrote:
> On Wed, Sep 12, 2007 at 11:20:06AM -0500, Kumar Gala wrote:
>> +[EMAIL PROTECTED] {
>> +reg = <0 0 0 0 0>;
>> +#size-cells = <2>;
>> +#address-cells = <3>;
>> +
On Wed, Sep 12, 2007 at 11:20:06AM -0500, Kumar Gala wrote:
> + [EMAIL PROTECTED] {
> + reg = <0 0 0 0 0>;
> + #size-cells = <2>;
> + #address-cells = <3>;
> + device_type = "pci";
> + [E
Added basic board port for MPC8572 DS reference platform that is
similiar to the MPC8544/33 DS reference platform in uniprocessor mode.
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
Updated device tree based on comments.
arch/powerpc/boot/dts/mpc8572ds.dts | 385
arch/powerp
