Re: [PATCH v3] powerpc: Add hibernation support for FSL BookE processors

2010-04-16 Thread Scott Wood
Anton Vorontsov wrote: + /* Invalidate TLB0 & TLB1 */ + li r6,0x04 + tlbivax 0,r6 + TLBSYNC + li r6,0x0c + tlbivax 0,r6 + TLBSYNC Is this needed? Shouldn't the boot process have already given us a sane TLB? -Scott _

[PATCH v3] powerpc: Add hibernation support for FSL BookE processors

2010-04-16 Thread Anton Vorontsov
This is started as swsusp_32.S modifications, but the amount of #ifdefs made the whole file horribly unreadable, so let's put the support into its own separate file. The code should be relatively easy to modify to support 44x BookEs as well, but since I don't have any 44x to test, let's confine th