Hi Michael,
Can you please share your review comments on this patch when you get a chance?
On 28/05/24 09:33, Anjali K wrote:
> Currently in some cases, when the sampled instruction address register
> latches to a specific address during sampling, the privilege bits captured
> in the sampled event
> On 28 May 2024, at 9:33 AM, Anjali K wrote:
>
> Currently in some cases, when the sampled instruction address register
> latches to a specific address during sampling, the privilege bits captured
> in the sampled event register are incorrect.
> For example, a snippet from the perf report on
Currently in some cases, when the sampled instruction address register
latches to a specific address during sampling, the privilege bits captured
in the sampled event register are incorrect.
For example, a snippet from the perf report on a power10 system is:
Overhead Address Command
