Re: [PATCH v3] ocxl: control via sysfs whether the FPGA is reloaded on a link reset

2020-03-23 Thread Andrew Donnellan
On 18/3/20 9:02 pm, Frederic Barrat wrote: From: Philippe Bergheaud Some opencapi FPGA images allow to control if the FPGA should be reloaded on the next adapter reset. If it is supported, the image specifies it through a Vendor Specific DVSEC in the config space of function 0. Signed-off-by:

Re: [PATCH v3] ocxl: control via sysfs whether the FPGA is reloaded on a link reset

2020-03-19 Thread Frederic Barrat
Le 18/03/2020 à 11:02, Frederic Barrat a écrit : From: Philippe Bergheaud Some opencapi FPGA images allow to control if the FPGA should be reloaded on the next adapter reset. If it is supported, the image specifies it through a Vendor Specific DVSEC in the config space of function 0. Signed

[PATCH v3] ocxl: control via sysfs whether the FPGA is reloaded on a link reset

2020-03-18 Thread Frederic Barrat
From: Philippe Bergheaud Some opencapi FPGA images allow to control if the FPGA should be reloaded on the next adapter reset. If it is supported, the image specifies it through a Vendor Specific DVSEC in the config space of function 0. Signed-off-by: Philippe Bergheaud --- Changelog: v2: - re