Re: [PATCH v2 12/16] KVM: PPC: Book3S HV: XIVE: add a TIMA mapping

2019-02-24 Thread David Gibson
On Fri, Feb 22, 2019 at 12:28:36PM +0100, Cédric Le Goater wrote: > Each thread has an associated Thread Interrupt Management context > composed of a set of registers. These registers let the thread handle > priority management and interrupt acknowledgment. The most important > are : > > - Int

[PATCH v2 12/16] KVM: PPC: Book3S HV: XIVE: add a TIMA mapping

2019-02-22 Thread Cédric Le Goater
Each thread has an associated Thread Interrupt Management context composed of a set of registers. These registers let the thread handle priority management and interrupt acknowledgment. The most important are : - Interrupt Pending Buffer (IPB) - Current Processor Priority (CPPR)