On Mon, 27 Apr 2015 13:32:30 +0530
Nikunj A Dadhania wrote:
> According to the pci-to-pci bridge specification, memory/io limit
> should be the last address of the window, while currently its set to
> last + 1. It broke when the memory range was increased and hit 32-bit
> limit. The last address
According to the pci-to-pci bridge specification, memory/io limit
should be the last address of the window, while currently its set to
last + 1. It broke when the memory range was increased and hit 32-bit
limit. The last address in the window is 0x. and max-mmio is
0x1.., because of
