On Mon, 13 Jul 2020 20:16:23 +0530, Madhavan Srinivasan wrote:
> IMC trace-mode record has MSR[HV PR] bits added in the third DW.
> These bits can be used to set the cpumode for the instruction pointer
> captured in each sample.
>
> Add support in kernel to use these bits to set the cpumode for
>
From: Anju T Sudhakar
IMC trace-mode record has MSR[HV PR] bits added in the third DW.
These bits can be used to set the cpumode for the instruction pointer
captured in each sample.
Add support in kernel to use these bits to set the cpumode for
each sample.
Signed-off-by: Anju T Sudhakar
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