[PATCH V5 0/6] Redesign SR-IOV on PowerNV

2015-10-08 Thread Wei Yang
In original design, it tries to group VFs to enable more number of VFs in the system, when VF BAR is bigger than 64MB. This design has a flaw in which one error on a VF will interfere other VFs in the same group. This patch series change this design by using M64 BAR in Single PE mode to cover only

Re: [PATCH V5 0/6] Redesign SR-IOV on PowerNV

2015-09-02 Thread Alexey Kardashevskiy
On 09/03/2015 11:29 AM, Wei Yang wrote: In original design, it tries to group VFs to enable more number of VFs in the system, when VF BAR is bigger than 64MB. This design has a flaw in which one error on a VF will interfere other VFs in the same group. This patch series change this design by usi

[PATCH V5 0/6] Redesign SR-IOV on PowerNV

2015-09-02 Thread Wei Yang
In original design, it tries to group VFs to enable more number of VFs in the system, when VF BAR is bigger than 64MB. This design has a flaw in which one error on a VF will interfere other VFs in the same group. This patch series change this design by using M64 BAR in Single PE mode to cover only