Re: [PATCH V4 7/7] cxl: Add psl9 specific code

2017-04-13 Thread Michael Ellerman
Frederic Barrat writes: > Le 12/04/2017 à 09:52, Andrew Donnellan a écrit : >> On 08/04/17 00:11, Christophe Lombard wrote: >>> +static u32 get_phb_index(struct device_node *np) >>> { >>> u32 phb_index; >>> >>> if (of_property_read_u32(np, "ibm,phb-index", &phb_index)) >>> -ret

Re: [PATCH V4 7/7] cxl: Add psl9 specific code

2017-04-12 Thread Frederic Barrat
Le 12/04/2017 à 09:52, Andrew Donnellan a écrit : On 08/04/17 00:11, Christophe Lombard wrote: +static u32 get_phb_index(struct device_node *np) { u32 phb_index; if (of_property_read_u32(np, "ibm,phb-index", &phb_index)) -return 0; +return -ENODEV; Function is uns

Re: [PATCH V4 7/7] cxl: Add psl9 specific code

2017-04-12 Thread Michael Ellerman
christophe lombard writes: > Le 12/04/2017 à 04:11, Michael Ellerman a écrit : > Hi, > > Here is a new patch which updates the documentation based > on the complet PATCH V4 7/7. > Let me know if it suits you. Fine by me, I'll wait for Fred's ack before I merge it all. > Index: capi2_linux_prepar

Re: [PATCH V4 7/7] cxl: Add psl9 specific code

2017-04-12 Thread christophe lombard
Le 12/04/2017 à 04:11, Michael Ellerman a écrit : Frederic Barrat writes: Le 07/04/2017 à 16:11, Christophe Lombard a écrit : The new Coherent Accelerator Interface Architecture, level 2, for the IBM POWER9 brings new content and features: - POWER9 Service Layer - Registers - Radix mode - Pro

Re: [PATCH V4 7/7] cxl: Add psl9 specific code

2017-04-12 Thread Andrew Donnellan
On 08/04/17 00:11, Christophe Lombard wrote: +static u32 get_phb_index(struct device_node *np) { u32 phb_index; if (of_property_read_u32(np, "ibm,phb-index", &phb_index)) - return 0; + return -ENODEV; Function is unsigned. -- Andrew Donnellan

Re: [PATCH V4 7/7] cxl: Add psl9 specific code

2017-04-11 Thread Michael Ellerman
Frederic Barrat writes: > Le 07/04/2017 à 16:11, Christophe Lombard a écrit : >> The new Coherent Accelerator Interface Architecture, level 2, for the >> IBM POWER9 brings new content and features: >> - POWER9 Service Layer >> - Registers >> - Radix mode >> - Process element entry >> - Dedicated-

Re: [PATCH V4 7/7] cxl: Add psl9 specific code

2017-04-11 Thread Frederic Barrat
Le 07/04/2017 à 16:11, Christophe Lombard a écrit : The new Coherent Accelerator Interface Architecture, level 2, for the IBM POWER9 brings new content and features: - POWER9 Service Layer - Registers - Radix mode - Process element entry - Dedicated-Shared Process Programming Model - Translatio

[PATCH V4 7/7] cxl: Add psl9 specific code

2017-04-07 Thread Christophe Lombard
The new Coherent Accelerator Interface Architecture, level 2, for the IBM POWER9 brings new content and features: - POWER9 Service Layer - Registers - Radix mode - Process element entry - Dedicated-Shared Process Programming Model - Translation Fault Handling - CAPP - Memory Context ID If a val