RE: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread Benjamin Herrenschmidt
On Wed, 2011-04-27 at 08:40 +0100, David Laight wrote: > I keep telling Eric that the code below is incorrect > modulo arithimetic... His previous versions were wrong yes. This one should be limping along afaik. But I tend to agree, testing delta is the way to go. Eric idea was to not test the si

Re: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread Eric B Munson
On Wed, 27 Apr 2011, David Laight wrote: > > > prev and val are both 64 bit variables holding 32 bit numbers, we do > not > > accumulate in either, they are both replaced by values directly from > the > > registers. > > So prev > val will not always be true. > > The code seems to be: > prev

RE: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread David Laight
> prev and val are both 64 bit variables holding 32 bit numbers, we do not > accumulate in either, they are both replaced by values directly from the > registers. > So prev > val will not always be true. The code seems to be: prev = local64_read(&event->hw.prev_count); val = read_pmc(eve

Re: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread Eric B Munson
On Wed, 27 Apr 2011, David Laight wrote: > > > + if (prev > val && (prev - val) < 256) > > + delta = 0; > > + > > + return delta; > > Also, 'prev' is a true 64bit value, but 'val' is only ever 32bits. > So once the 64bit 'prev' exceeds 2^32+256 both 'prev > val' > and 'prev - val'

RE: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread David Laight
> On Wed, 27 Apr 2011, David Laight wrote: > > > > But it isn't, and it doesn't have trouble with 2^32 - 1. > > > > what about: > > prev = 0x0001 > > val = 0x > > Result is 0xfffe and we are fine. 'delta' will be 0xfffe, but you need the function to return zero - since

Re: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread Eric B Munson
On Wed, 27 Apr 2011, David Laight wrote: > > But it isn't, and it doesn't have trouble with 2^32 - 1. > > what about: > prev = 0x0001 > val = 0x Result is 0xfffe and we are fine. > > David > > signature.asc Description: Digital signature

RE: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread David Laight
> + if (prev > val && (prev - val) < 256) > + delta = 0; > + > + return delta; Also, 'prev' is a true 64bit value, but 'val' is only ever 32bits. So once the 64bit 'prev' exceeds 2^32+256 both 'prev > val' and 'prev - val' are true regardless of the value of 'val'. This will

RE: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread David Laight
> But it isn't, and it doesn't have trouble with 2^32 - 1. what about: prev = 0x0001 val = 0x David ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread Eric B Munson
On Wed, 27 Apr 2011, David Laight wrote: > I keep telling Eric that the code below is incorrect > modulo arithimetic... But it isn't, and it doesn't have trouble with 2^32 - 1. Here is one done by hand: Counter is at 0x and is rolled over to 0x101 (258 counted items so that we miss the

RE: [PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-27 Thread David Laight
I keep telling Eric that the code below is incorrect modulo arithimetic... > +static u64 check_and_compute_delta(u64 prev, u64 val) > +{ > + u64 delta = (val - prev) & 0xul; > + > + /* > + * POWER7 can roll back counter values, if the new value is smaller > + * than the p

[PATCH V4] POWER: perf_event: Skip updating kernel counters if register value shrinks

2011-04-15 Thread Eric B Munson
Because of speculative event roll back, it is possible for some event coutners to decrease between reads on POWER7. This causes a problem with the way that counters are updated. Delta calues are calculated in a 64 bit value and the top 32 bits are masked. If the register value has decreased, thi