Le 24/11/2020 à 14:45, Jason Gunthorpe a écrit :
On Tue, Nov 24, 2020 at 09:17:38AM +, Christoph Hellwig wrote:
@@ -470,6 +487,26 @@ void ocxl_link_release(struct pci_dev *dev, void
*link_handle)
}
EXPORT_SYMBOL_GPL(ocxl_link_release);
+static void invalidate_range(struct mmu_notif
On Tue, Nov 24, 2020 at 09:17:38AM +, Christoph Hellwig wrote:
> > @@ -470,6 +487,26 @@ void ocxl_link_release(struct pci_dev *dev, void
> > *link_handle)
> > }
> > EXPORT_SYMBOL_GPL(ocxl_link_release);
> >
> > +static void invalidate_range(struct mmu_notifier *mn,
> > +
You probably want to add Jason for an audit of new notifier uses.
On Fri, Nov 20, 2020 at 06:32:40PM +0100, Christophe Lombard wrote:
> Add invalidate_range mmu notifier, when required (ATSD access of MMIO
> registers is available), to initiate TLB invalidation commands.
> For the time being, the
On 20/11/2020 18:32, Christophe Lombard wrote:
Add invalidate_range mmu notifier, when required (ATSD access of MMIO
registers is available), to initiate TLB invalidation commands.
For the time being, the ATSD0 set of registers is used by default.
The pasid and bdf values have to be configure
Add invalidate_range mmu notifier, when required (ATSD access of MMIO
registers is available), to initiate TLB invalidation commands.
For the time being, the ATSD0 set of registers is used by default.
The pasid and bdf values have to be configured in the Process Element
Entry.
The PEE must be set
