Michael Ellerman writes:
>> > I think a better API would be that opal_return_cpu() deals with this under
>> > the
>> > covers. I think we talked about that, so maybe there was some reason that
>> > wasn't possible.
>>
>> opal_return_cpu() acts on current CPU which if we started flipping HILE
>>
On Wed, 2015-07-08 at 16:51 +1000, Stewart Smith wrote:
> Michael Ellerman writes:
> > On Wed, 2015-07-08 at 14:37 +1000, Samuel Mendoza-Jonas wrote:
> >> On powernv secondary cpus are returned to OPAL, and will then enter the
> >> target kernel in big-endian. However if it is set the HILE bit wil
On 08/07/15 16:51, Stewart Smith wrote:
> Michael Ellerman writes:
>> On Wed, 2015-07-08 at 14:37 +1000, Samuel Mendoza-Jonas wrote:
>>> On powernv secondary cpus are returned to OPAL, and will then enter the
>>> target kernel in big-endian. However if it is set the HILE bit will persist,
>>> caus
Michael Ellerman writes:
> On Wed, 2015-07-08 at 14:37 +1000, Samuel Mendoza-Jonas wrote:
>> On powernv secondary cpus are returned to OPAL, and will then enter the
>> target kernel in big-endian. However if it is set the HILE bit will persist,
>> causing the first exception in the target kernel t
On Wed, 2015-07-08 at 14:37 +1000, Samuel Mendoza-Jonas wrote:
> On powernv secondary cpus are returned to OPAL, and will then enter the
> target kernel in big-endian. However if it is set the HILE bit will persist,
> causing the first exception in the target kernel to be delivered in
> litte-endia
On powernv secondary cpus are returned to OPAL, and will then enter the
target kernel in big-endian. However if it is set the HILE bit will persist,
causing the first exception in the target kernel to be delivered in
litte-endian regardless of the kernel endianess.
Make sure that the HILE bit is sw
