Hi
>
> This looks better :)
>
> On Wed, Apr 03, 2019 at 10:07:40AM +, S.j. Wang wrote:
> > @@ -218,7 +218,7 @@ static int fsl_esai_set_dai_sysclk(struct
> > snd_soc_dai *dai, int clk_id, {
> > struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);
> > struct clk *clksrc = esai_p
This looks better :)
On Wed, Apr 03, 2019 at 10:07:40AM +, S.j. Wang wrote:
> @@ -218,7 +218,7 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai
> *dai, int clk_id,
> {
> struct fsl_esai *esai_priv = snd_soc_dai_get_drvdata(dai);
> struct clk *clksrc = esai_priv->extalclk;
In ESAI synchronous mode, the clock is generated by Tx, So
we should always set registers of Tx which relate with the
bit clock and frame clock generation (TCCR, TCR, ECR), even
there is only Rx is working.
Signed-off-by: Shengjiu Wang
---
changes in v2
- refine the patch according Nicolin's comm