On Fri, Oct 25, 2019 at 03:13:22PM +0800, Shengjiu Wang wrote:
> The output divider should align with the output sample
> rate, if use ideal sample rate, there will be a lot of overload,
> which would cause underrun.
>
> The maximum divider of asrc clock is 1024, but there is no
> judgement for th
The output divider should align with the output sample
rate, if use ideal sample rate, there will be a lot of overload,
which would cause underrun.
The maximum divider of asrc clock is 1024, but there is no
judgement for this limitaion in driver, which may cause the divider
setting not correct.
F
