Re: [PATCH RESEND v3 1/6] powerpc: atomic: Make *xchg and *cmpxchg a full barrier

2015-10-14 Thread Michael Ellerman
On Wed, 2015-10-14 at 11:33 +0200, Peter Zijlstra wrote: > On Wed, Oct 14, 2015 at 05:26:53PM +0800, Boqun Feng wrote: > > Michael and Peter, rest of this patchset depends on commits which are > > currently in the locking/core branch of the tip, so I would like it as a > > whole queued there. Besid

Re: [PATCH RESEND v3 1/6] powerpc: atomic: Make *xchg and *cmpxchg a full barrier

2015-10-14 Thread Peter Zijlstra
On Wed, Oct 14, 2015 at 05:26:53PM +0800, Boqun Feng wrote: > Michael and Peter, rest of this patchset depends on commits which are > currently in the locking/core branch of the tip, so I would like it as a > whole queued there. Besides, I will keep this patch Cc'ed to stable in > future versions,

Re: [PATCH RESEND v3 1/6] powerpc: atomic: Make *xchg and *cmpxchg a full barrier

2015-10-14 Thread Boqun Feng
On Wed, Oct 14, 2015 at 10:06:13AM +0200, Peter Zijlstra wrote: > On Wed, Oct 14, 2015 at 08:51:34AM +0800, Boqun Feng wrote: > > On Wed, Oct 14, 2015 at 11:10:00AM +1100, Michael Ellerman wrote: > > > > Thanks for fixing this. In future you should send a patch like this as a > > > separate patch.

Re: [PATCH RESEND v3 1/6] powerpc: atomic: Make *xchg and *cmpxchg a full barrier

2015-10-14 Thread Peter Zijlstra
On Wed, Oct 14, 2015 at 08:51:34AM +0800, Boqun Feng wrote: > On Wed, Oct 14, 2015 at 11:10:00AM +1100, Michael Ellerman wrote: > > Thanks for fixing this. In future you should send a patch like this as a > > separate patch. I've not been paying attention to it because I assumed it > > was > > G

Re: [PATCH RESEND v3 1/6] powerpc: atomic: Make *xchg and *cmpxchg a full barrier

2015-10-13 Thread Boqun Feng
On Wed, Oct 14, 2015 at 11:10:00AM +1100, Michael Ellerman wrote: > On Mon, 2015-10-12 at 22:30 +0800, Boqun Feng wrote: > > According to memory-barriers.txt, xchg, cmpxchg and their atomic{,64}_ > > versions all need to imply a full barrier, however they are now just > > RELEASE+ACQUIRE, which is

Re: [PATCH RESEND v3 1/6] powerpc: atomic: Make *xchg and *cmpxchg a full barrier

2015-10-13 Thread Michael Ellerman
On Mon, 2015-10-12 at 22:30 +0800, Boqun Feng wrote: > According to memory-barriers.txt, xchg, cmpxchg and their atomic{,64}_ > versions all need to imply a full barrier, however they are now just > RELEASE+ACQUIRE, which is not a full barrier. > > So replace PPC_RELEASE_BARRIER and PPC_ACQUIRE_BA

[PATCH RESEND v3 1/6] powerpc: atomic: Make *xchg and *cmpxchg a full barrier

2015-10-12 Thread Boqun Feng
According to memory-barriers.txt, xchg, cmpxchg and their atomic{,64}_ versions all need to imply a full barrier, however they are now just RELEASE+ACQUIRE, which is not a full barrier. So replace PPC_RELEASE_BARRIER and PPC_ACQUIRE_BARRIER with PPC_ATOMIC_ENTRY_BARRIER and PPC_ATOMIC_EXIT_BARRIER