Re: [PATCH 4/9] powerpc/64s: SLB miss handler avoid r3 save/restore

2017-06-19 Thread Nicholas Piggin
On Mon, 19 Jun 2017 14:48:37 +1000 Michael Ellerman wrote: > Nicholas Piggin writes: > > > diff --git a/arch/powerpc/kernel/exceptions-64s.S > > b/arch/powerpc/kernel/exceptions-64s.S > > index 486e205cc762..6ba4c4c6ae69 100644 > > --- a/arch/powerpc/kernel/exceptions-64s.S > > +++ b/arch/powe

Re: [PATCH 4/9] powerpc/64s: SLB miss handler avoid r3 save/restore

2017-06-18 Thread Michael Ellerman
Nicholas Piggin writes: > diff --git a/arch/powerpc/kernel/exceptions-64s.S > b/arch/powerpc/kernel/exceptions-64s.S > index 486e205cc762..6ba4c4c6ae69 100644 > --- a/arch/powerpc/kernel/exceptions-64s.S > +++ b/arch/powerpc/kernel/exceptions-64s.S > @@ -625,6 +625,9 @@ EXC_COMMON_BEGIN(slb_miss

[PATCH 4/9] powerpc/64s: SLB miss handler avoid r3 save/restore

2017-05-21 Thread Nicholas Piggin
The SLB miss handler uses r3 for the faulting address but r12 is mostly able to be freed up to save r3 in. It just requires SRR1 be reloaded again on error. It would be more conventional to use r12 for SRR1 (and use r11 to save r3), but slb_allocate_realmode clobbers r11 and not r12. Signed-off-b