Hi Nicholas,
I love your patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on v5.0-rc2 next-20190116]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commit
Handlers for interrupts that set DAR / DSISR, set MSR[RI] before those
SPRs are read and saved away.
If a d-side machine check hits in this window, DAR / DSISR will be
clobbered silently, leading to random behaviour.
Fix this by saving those registers before MSR[RI] is set.
Signed-off-by: Nichol
