On Mon, Jul 18, 2016 at 11:28:30AM +1000, Cyril Bur wrote:
> On Sun, 17 Jul 2016 11:25:43 +0800
>
> The aim of this patch is to ensure that pt_regs, fp_state and vr_state always
> hold a threads 'live' registers. So, after a recheckpoint fp_state is where
> the
> the state should be. tm_reclaim_t
On Sun, 17 Jul 2016 11:25:43 +0800
Simon Guo wrote:
> Hi Cyril,
> On Wed, Jun 08, 2016 at 02:00:34PM +1000, Cyril Bur wrote:
> > @@ -917,24 +907,10 @@ static inline void tm_recheckpoint_new_task(struct
> > task_struct *new)
> > "(new->msr 0x%lx, new->origmsr 0x%lx)\n",
> >
Hi Cyril,
On Wed, Jun 08, 2016 at 02:00:34PM +1000, Cyril Bur wrote:
> @@ -917,24 +907,10 @@ static inline void tm_recheckpoint_new_task(struct
> task_struct *new)
>"(new->msr 0x%lx, new->origmsr 0x%lx)\n",
>new->pid, new->thread.regs->msr, msr);
>
> - /* This
On Tue, 28 Jun 2016 11:53:13 +0800
Simon Guo wrote:
> hi Cyril,
>
> On Wed, Jun 08, 2016 at 02:00:34PM +1000, Cyril Bur wrote:
> > @@ -1108,11 +1084,11 @@ struct task_struct *__switch_to(struct task_struct
> > *prev,
> > */
> > save_sprs(&prev->thread);
> >
> > - __switch_to_tm(pre
hi Cyril,
On Wed, Jun 08, 2016 at 02:00:34PM +1000, Cyril Bur wrote:
> @@ -1108,11 +1084,11 @@ struct task_struct *__switch_to(struct task_struct
> *prev,
>*/
> save_sprs(&prev->thread);
>
> - __switch_to_tm(prev);
> -
> /* Save FPU, Altivec, VSX and SPE state */
>
There is currently an inconsistency as to how the entire CPU register
state is saved and restored when a thread uses transactional memory
(TM).
Using transactional memory results in the CPU having duplicated
(almost all) of its register state. This duplication results in a set
of registers which c
