> From: Fabio M. De Francesco
> [...]
> Subject: [PATCH 3/4 v3] ACPI: extlog: Trace CPER PCI Express Error Section
>
> I/O Machine Check Architecture events may signal failing PCIe components or
> links. The AER event contains details on what was happening on the wire
&g
On 6/3/25 8:54 AM, Fabio M. De Francesco wrote:
I/O Machine Check Architecture events may signal failing PCIe components
or links. The AER event contains details on what was happening on the wire
when the error was signaled.
Trace the CPER PCIe Error section (UEFI v2.10, Appendix N.2.7) report
On 6/3/25 8:54 AM, Fabio M. De Francesco wrote:
> I/O Machine Check Architecture events may signal failing PCIe components
> or links. The AER event contains details on what was happening on the wire
> when the error was signaled.
>
> Trace the CPER PCIe Error section (UEFI v2.10, Appendix N.2.
On 6/3/25 8:54 AM, Fabio M. De Francesco wrote:
> I/O Machine Check Architecture events may signal failing PCIe components
> or links. The AER event contains details on what was happening on the wire
> when the error was signaled.
>
> Trace the CPER PCIe Error section (UEFI v2.10, Appendix N.2.
I/O Machine Check Architecture events may signal failing PCIe components
or links. The AER event contains details on what was happening on the wire
when the error was signaled.
Trace the CPER PCIe Error section (UEFI v2.10, Appendix N.2.7) reported
by the I/O MCA.
Cc: Dan Williams
Signed-off-by:
