On Mon, 2009-08-03 at 12:57 -0500, Dave Kleikamp wrote:
> > cpu_last_thread_in_core(cpu) is a moving target. You want something
> > like:
> >
> > cpu = cpu_first_thread_in_core(cpu);
> > last = cpu_last_thread_in_core(cpu);
> > while (cpu <= last) {
> > __clear_bit(id, stale_map[cpu]);
> >
> for (cpu = cpu_first_thread_in_core(cpu);
> cpu <= cpu_last_thread_in_core(cpu); cpu++)
> __clear_bit(id, stale_map[cpu]);
>
> ==
>
> cpu = cpu_first_thread_in_core(cpu);
> while (cpu <= cpu_last_thread_in_core(cpu)) {
> __clear_bit(id, stale_map[cpu]);
> cpu++;
> }
>
On Mon, 2009-08-03 at 12:06 -0500, Dave Kleikamp wrote:
> On Mon, 2009-08-03 at 11:21 -0500, Kumar Gala wrote:
> > On Aug 2, 2009, at 9:03 PM, Michael Ellerman wrote:
> >
> > > for (cpu = cpu_first_thread_in_core(cpu);
> > > cpu <= cpu_last_thread_in_core(cpu); cpu++)
> > >__clear_bit
On Mon, 2009-08-03 at 11:21 -0500, Kumar Gala wrote:
> On Aug 2, 2009, at 9:03 PM, Michael Ellerman wrote:
>
> > On Sat, 2009-08-01 at 08:29 +1000, Benjamin Herrenschmidt wrote:
> >> On Thu, 2009-07-30 at 22:35 -0500, Kumar Gala wrote:
> /* XXX This clear should ultimately be par
On Aug 2, 2009, at 9:03 PM, Michael Ellerman wrote:
On Sat, 2009-08-01 at 08:29 +1000, Benjamin Herrenschmidt wrote:
On Thu, 2009-07-30 at 22:35 -0500, Kumar Gala wrote:
/* XXX This clear should ultimately be part of
local_flush_tlb_mm */
- __clear_bit(id, stale_map
On Sat, 2009-08-01 at 08:29 +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2009-07-30 at 22:35 -0500, Kumar Gala wrote:
> > > /* XXX This clear should ultimately be part of
> > local_flush_tlb_mm */
> > > - __clear_bit(id, stale_map[cpu]);
> > > + for (cpu = cp
On Thu, 2009-07-30 at 22:35 -0500, Kumar Gala wrote:
> > /* XXX This clear should ultimately be part of
> local_flush_tlb_mm */
> > - __clear_bit(id, stale_map[cpu]);
> > + for (cpu = cpu_first_thread_in_core(cpu);
> > + cpu <= cpu_last_thread_
On Jul 30, 2009, at 10:12 PM, Kumar Gala wrote:
On Jul 24, 2009, at 4:15 AM, Benjamin Herrenschmidt wrote:
The current "no hash" MMU context management code is written with
the assumption that one CPU == one TLB. This is not the case on
implementations that support HW multithreading, where s
On Jul 24, 2009, at 4:15 AM, Benjamin Herrenschmidt wrote:
The current "no hash" MMU context management code is written with
the assumption that one CPU == one TLB. This is not the case on
implementations that support HW multithreading, where several
linux CPUs can share the same TLB.
This add
The current "no hash" MMU context management code is written with
the assumption that one CPU == one TLB. This is not the case on
implementations that support HW multithreading, where several
linux CPUs can share the same TLB.
This adds some basic support for this to our context management
and our
The current "no hash" MMU context management code is written with
the assumption that one CPU == one TLB. This is not the case on
implementations that support HW multithreading, where several
linux CPUs can share the same TLB.
This adds some basic support for this to our context management
and our
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