On 06/17/2013 09:34:49 PM, Lian Minghuan-b31939 wrote:
Hi Soctt,
please see my comments inline.
On 06/18/2013 08:15 AM, Scott Wood wrote:
On 06/16/2013 10:00:01 PM, Lian Minghuan-b31939 wrote:
Hi Scott,
please see my comments inline.
On 06/15/2013 06:09 AM, Scott Wood wrote:
On 06/14/2013
Hi Soctt,
please see my comments inline.
On 06/18/2013 08:15 AM, Scott Wood wrote:
On 06/16/2013 10:00:01 PM, Lian Minghuan-b31939 wrote:
Hi Scott,
please see my comments inline.
On 06/15/2013 06:09 AM, Scott Wood wrote:
On 06/14/2013 02:15:56 AM, Minghuan Lian wrote:
diff --git a/arch/powe
On 06/16/2013 10:00:01 PM, Lian Minghuan-b31939 wrote:
Hi Scott,
please see my comments inline.
On 06/15/2013 06:09 AM, Scott Wood wrote:
On 06/14/2013 02:15:56 AM, Minghuan Lian wrote:
diff --git a/arch/powerpc/sysdev/fsl_msi.h
b/arch/powerpc/sysdev/fsl_msi.h
index 8225f86..43a9d99 100644
Hi Scott,
please see my comments inline.
On 06/15/2013 06:09 AM, Scott Wood wrote:
On 06/14/2013 02:15:56 AM, Minghuan Lian wrote:
@@ -421,10 +440,29 @@ static int fsl_of_msi_probe(struct
platform_device *dev)
}
msi->msiir_offset =
features->msiir_offset + (res.
On 06/14/2013 02:15:56 AM, Minghuan Lian wrote:
@@ -421,10 +440,29 @@ static int fsl_of_msi_probe(struct
platform_device *dev)
}
msi->msiir_offset =
features->msiir_offset + (res.start & 0xf);
+
+ /*
+* Fi
MPIC controller v4.3 provides MSIIR1 to index 16 MSI registers.
MSIIR can only index 8 MSI registers. MSIIR1 uses different bits
definition than MSIIR. This patch adds ibs_shift and srs_shift to
indicate the bits definition of the MSIIR and MSIIR1, so the same
code can handle the MSIIR and MSIIR1 s
