On Thu, 2015-03-26 at 17:15 +0800, ying.zh...@freescale.com wrote:
> From: Ying Zhang
>
> Create the dts files for each core and splits the devices between
> the two cores for P1021RDB-PC.
>
> Core0 has l2, serial0, i2c, spi, gpio, tdm,dma, usb, eth0, eth1,
> sdhc, crypto, global-util, message,
From: Ying Zhang
Create the dts files for each core and splits the devices between
the two cores for P1021RDB-PC.
Core0 has l2, serial0, i2c, spi, gpio, tdm,dma, usb, eth0, eth1,
sdhc, crypto, global-util, message, pci0, pci1, msi, crypto.
Core1 has l2, serial1, eth2.
Signed-off-by: Ying Zhang
