On Mon, 2008-12-15 at 16:19 -0600, Kumar Gala wrote:
> Ok. Lets use MMU_FTR_LOCK_BCAST_TLB_OPS and have a comment about
> locking because bus implementations cant handle multiple ivax and/or
> multiple syncs.
>
Hi used MMU_FTR_LOCK_BCAST_INVAL :-) And I put a comment that says:
/* This indic
On Dec 15, 2008, at 3:18 PM, Benjamin Herrenschmidt wrote:
On Mon, 2008-12-15 at 15:10 -0600, Kumar Gala wrote:
Hmm.. are you mixing the two different locking needs together? The
is
locking of ivax vs tlbwe and there is locking around multiple "msgs"
on the bus. I know for us we can have
On Mon, 2008-12-15 at 15:10 -0600, Kumar Gala wrote:
> Hmm.. are you mixing the two different locking needs together? The is
> locking of ivax vs tlbwe and there is locking around multiple "msgs"
> on the bus. I know for us we can have any # of ivax's on the bus, but
> only one tlbsync.
I
On Dec 15, 2008, at 3:03 PM, Benjamin Herrenschmidt wrote:
The whole thing. Not totally clear, you have a better name ? Some
CPUs
want a lock on sync and some on ivax, I plan to lock the whole
sequence.
MMU_FTR_TLBIVAX_OR_SYNC_NEED_LOCK ?
Which completely blows away the nice tab'ing :-)
> > The whole thing. Not totally clear, you have a better name ? Some CPUs
> > want a lock on sync and some on ivax, I plan to lock the whole
> > sequence.
>
> MMU_FTR_TLBIVAX_OR_SYNC_NEED_LOCK ?
Which completely blows away the nice tab'ing :-)
MMU_FTR_LOCK_BCAST_TLB_OPS ?
> Its probably a g
On Dec 15, 2008, at 2:46 PM, Benjamin Herrenschmidt wrote:
Index: linux-work/arch/powerpc/include/asm/mmu.h
===
--- linux-work.orig/arch/powerpc/include/asm/mmu.h 2008-12-15
14:36:20.0 +1100
+++ linux-work/arch/powerp
> > +void local_flush_tlb_mm(struct mm_struct *mm)
> > +{
> > + unsigned int pid;
> > +
> > + preempt_disable();
> > + pid = mm->context.id;
> > + if (pid != MMU_NO_CONTEXT)
> > + _tlbil_pid(pid);
> > + preempt_enable();
> > +}
> > +EXPORT_SYMBOL(local_flush_tlb_mm);
>
> Do th
On Dec 14, 2008, at 11:44 PM, Benjamin Herrenschmidt wrote:
This patch moves the whole no-hash TLB handling out of line into a
new tlb_nohash.c file, and implements some basic SMP support using
IPIs and/or broadcast tlbivax instructions.
Note that I'm using local invalidations for D->I cache c
This patch moves the whole no-hash TLB handling out of line into a
new tlb_nohash.c file, and implements some basic SMP support using
IPIs and/or broadcast tlbivax instructions.
Note that I'm using local invalidations for D->I cache coherency.
At worst, if another processor is trying to execute t
