[PATCH 10/15] cxl: Add preliminary workaround for CX4 interrupt limitation

2016-07-13 Thread Ian Munsie
From: Ian Munsie The Mellanox CX4 has a hardware limitation where only 4 bits of the AFU interrupt number can be passed to the XSL when sending an interrupt, limiting it to only 15 interrupts per context (AFU interrupt number 0 is invalid). In order to overcome this, we will allocate additional

Re: [PATCH 10/15] cxl: Add preliminary workaround for CX4 interrupt limitation

2016-07-12 Thread Andrew Donnellan
On 11/07/16 21:50, Ian Munsie wrote: From: Ian Munsie The Mellanox CX4 has a hardware limitation where only 4 bits of the AFU interrupt number can be passed to the XSL when sending an interrupt, limiting it to only 15 interrupts per context (AFU interrupt number 0 is invalid). In order to over

[PATCH 10/15] cxl: Add preliminary workaround for CX4 interrupt limitation

2016-07-11 Thread Ian Munsie
From: Ian Munsie The Mellanox CX4 has a hardware limitation where only 4 bits of the AFU interrupt number can be passed to the XSL when sending an interrupt, limiting it to only 15 interrupts per context (AFU interrupt number 0 is invalid). In order to overcome this, we will allocate additional